WebSVN – zxusbnet – Blame – //branches/clkfix/drivers/W5300_Drv_V1.2.2/w5300.c

Rev	Author	Line No.	Line
47	dimkam	1	#include <stdio.h>
		2	#include <string.h>
		3	#include "w5300.h"
		4	#include "md5.h"
		5
		6	static uint8 Subnet[4];
		7
		8	uint32 TXMEM_SIZE[MAX_SOCK_NUM];
		9
		10	uint32 RXMEM_SIZE[MAX_SOCK_NUM];
		11
		12	uint8 SOCK_INT[MAX_SOCK_NUM];
		13
		14
		15	/***********************
		16	* Basic I/O Function *
		17	***********************/
		18
		19	uint8 IINCHIP_READ(uint16 addr)
		20	{
		21	#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
		22	return (((uint8)addr));
		23	#else
		24	uint8 data;
		25	IINCHIP_CRITICAL_SECTION_ENTER();
		26	((uint8)IDM_AR0) = (uint8)(addr >> 8);
		27	((uint8)IDM_AR1) = (uint8)(addr & 0x00ff);
		28	if(addr & 0x01) data = ((uint8)IDM_DR1);
		29	else data = ((uint8)IDM_DR0);
		30	IINCHIP_CRITICAL_SECTION_EXIT();
		31	return data;
		32	#endif
		33	}
		34	void IINCHIP_WRITE(uint16 addr, uint8 data)
		35	{
		36	#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
		37	(((vuint8)addr)) = data;
		38	#else
		39	IINCHIP_CRITICAL_SECTION_ENTER();
		40	((vuint8)IDM_AR0) = (uint8)(addr >> 8);
		41	((vuint8)IDM_AR1) = (uint8)(addr & 0x00ff);
		42	if(addr & 0x01) ((vuint8)IDM_DR1) = data;
		43	else ((vuint8)IDM_DR0) = data;
		44	IINCHIP_CRITICAL_SECTION_EXIT();
		45	#endif
		46	}
		47
		48	uint16 getMR(void)
		49	{
		50	uint16 ret;
		51	ret = (uint8)MR0;
		52	ret = (ret << 8) + (uint8)MR1;
		53	return ret;
		54	}
		55	void setMR(uint16 val)
		56	{
		57	(uint8)MR0 = (uint8)((val >> 8) & 0xff);
		58	(uint8)MR1 = (uint8)(val & 0xff);
		59	}
		60
		61
		62	/***********************************
		63	* COMMON Register Access Function *
		64	***********************************/
		65
		66	/* Interrupt */
		67
		68	uint16 getIR(void)
		69	{
		70	uint16 ret;
		71	ret = IINCHIP_READ(IR0);
		72	ret = (ret << 8) + (IINCHIP_READ(IR1));
		73	return ret;
		74	}
		75
		76	void setIR(uint16 val)
		77	{
		78	IINCHIP_WRITE(IR0, (uint8)(val >> 8));
		79	IINCHIP_WRITE(IR1, (uint8)(val & 0xff));
		80	}
		81
		82	uint16 getIMR(void)
		83	{
		84	uint16 ret;
		85	ret = IINCHIP_READ(IMR0);
		86	ret = (ret<<8) + IINCHIP_READ(IMR1);
		87	return ret;
		88	}
		89	void setIMR(uint16 mask)
		90	{
		91	IINCHIP_WRITE(IMR0, (uint8)(mask >> 8));
		92	IINCHIP_WRITE(IMR1, (uint8)(mask & 0xff));
		93	}
		94
		95
		96	/* Network Information */
		97
		98	void getSHAR(uint8 * addr)
		99	{
		100	addr[0] = (uint8)IINCHIP_READ(SHAR0);
		101	addr[1] = (uint8)IINCHIP_READ(SHAR1);
		102	addr[2] = (uint8)IINCHIP_READ(SHAR2);
		103	addr[3] = (uint8)IINCHIP_READ(SHAR3);
		104	addr[4] = (uint8)IINCHIP_READ(SHAR4);
		105	addr[5] = (uint8)IINCHIP_READ(SHAR5);
		106	}
		107	void setSHAR(uint8 * addr)
		108	{
		109	IINCHIP_WRITE(SHAR0,(uint8)addr[0]);
		110	IINCHIP_WRITE(SHAR1,(uint8)addr[1]);
		111	IINCHIP_WRITE(SHAR2,(uint8)addr[2]);
		112	IINCHIP_WRITE(SHAR3,(uint8)addr[3]);
		113	IINCHIP_WRITE(SHAR4,(uint8)addr[4]);
		114	IINCHIP_WRITE(SHAR5,(uint8)addr[5]);
		115	}
		116
		117	void getGAR(uint8 * addr)
		118	{
		119	addr[0] = (uint8)(IINCHIP_READ(GAR0));
		120	addr[1] = (uint8)(IINCHIP_READ(GAR1));
		121	addr[2] = (uint8)(IINCHIP_READ(GAR2));
		122	addr[3] = (uint8)(IINCHIP_READ(GAR3));
		123	}
		124
		125	void setGAR(uint8 * addr)
		126	{
		127	IINCHIP_WRITE(GAR0, (uint8)addr[0]);
		128	IINCHIP_WRITE(GAR1, (uint8)addr[1]);
		129	IINCHIP_WRITE(GAR2, (uint8)addr[2]);
		130	IINCHIP_WRITE(GAR3, (uint8)addr[3]);
		131	}
		132
		133	void getSUBR(uint8 * addr)
		134	{
		135	addr[0] = (uint8)Subnet[0];
		136	addr[1] = (uint8)Subnet[1];
		137	addr[2] = (uint8)Subnet[2];
		138	addr[3] = (uint8)Subnet[3];
		139	}
		140
		141	void setSUBR(uint8 * addr)
		142	{
		143	Subnet[0] = addr[0];
		144	Subnet[1] = addr[1];
		145	Subnet[2] = addr[2];
		146	Subnet[3] = addr[3];
		147	}
		148	void ApplySubnet()
		149	{
		150	IINCHIP_WRITE((SUBR),Subnet[0]);
		151	IINCHIP_WRITE((SUBR),Subnet[1]);
		152	IINCHIP_WRITE((SUBR),Subnet[2]);
		153	IINCHIP_WRITE((SUBR),Subnet[3]);
		154	}
		155	void ClearSubnet()
		156	{
		157	IINCHIP_WRITE((SUBR),0);
		158	IINCHIP_WRITE((SUBR),0);
		159	IINCHIP_WRITE((SUBR),0);
		160	IINCHIP_WRITE((SUBR),0);
		161	}
		162	void getSIPR(uint8 * addr)
		163	{
		164	addr[0] = (uint8)(IINCHIP_READ(SIPR0));
		165	addr[1] = (uint8)(IINCHIP_READ(SIPR1));
		166	addr[2] = (uint8)(IINCHIP_READ(SIPR2));
		167	addr[3] = (uint8)(IINCHIP_READ(SIPR3));
		168	}
		169
		170	void setSIPR(uint8 * addr)
		171	{
		172	IINCHIP_WRITE(SIPR0,(uint8)addr[0]);
		173	IINCHIP_WRITE(SIPR1,(uint8)addr[1]);
		174	IINCHIP_WRITE(SIPR2,(uint8)addr[2]);
		175	IINCHIP_WRITE(SIPR3,(uint8)addr[3]);
		176	}
		177
		178
		179	/* Retransmittion */
		180
		181	uint16 getRTR(void)
		182	{
		183	uint16 ret;
		184	ret = IINCHIP_READ(RTR0);
		185	ret = (RTR0 << 8) + IINCHIP_READ(RTR1);
		186	return ret;
		187	}
		188	void setRTR(uint16 timeout)
		189	{
		190	IINCHIP_WRITE(RTR0, ((uint8)(timeout >> 8)));
		191	IINCHIP_WRITE(RTR1, timeout & 0xff);
		192	}
		193
		194	uint8 getRCR(void)
		195	{
		196	return (uint8)IINCHIP_READ(RCR1);
		197	}
		198
		199	void setRCR(uint8 retry)
		200	{
		201	IINCHIP_WRITE(RCR1,retry);
		202	}
		203
		204	/* PPPoE */
		205	uint16 getPATR(void)
		206	{
		207	uint16 ret;
		208	ret = IINCHIP_READ(PATR0);
		209	ret = (ret << 8) + IINCHIP_READ(PATR1);
		210	return ret;
		211	}
		212
		213	uint8 getPTIMER(void)
		214	{
		215	return (uint8)IINCHIP_READ(PTIMER1);
		216	}
		217	void setPTIMER(uint8 time)
		218	{
		219	IINCHIP_WRITE(PTIMER1,time);
		220	}
		221
		222	uint8 getPMAGICR(void)
		223	{
		224	return (uint8)IINCHIP_READ(PMAGICR1);
		225	}
		226
		227	void setPMAGICR(uint8 magic)
		228	{
		229	IINCHIP_WRITE(PMAGICR1,magic);
		230	}
		231
		232	uint16 getPSIDR(void)
		233	{
		234	uint16 ret;
		235	ret = IINCHIP_READ(PSIDR0);
		236	ret = (ret << 8) + IINCHIP_READ(PSIDR1);
		237	return ret;
		238	}
		239
		240	void getPDHAR(uint8* addr)
		241	{
		242	addr[0] = (uint8)(IINCHIP_READ(PDHAR0));
		243	addr[1] = (uint8)(IINCHIP_READ(PDHAR1));
		244	addr[2] = (uint8)(IINCHIP_READ(PDHAR2));
		245	addr[3] = (uint8)(IINCHIP_READ(PDHAR3));
		246	addr[4] = (uint8)(IINCHIP_READ(PDHAR4));
		247	addr[5] = (uint8)(IINCHIP_READ(PDHAR5));
		248	}
		249
		250
		251	/* ICMP packets */
		252
		253	void getUIPR(uint8* addr)
		254	{
		255	addr[0] = (uint8)(IINCHIP_READ(UIPR0));
		256	addr[1] = (uint8)(IINCHIP_READ(UIPR1));
		257	addr[2] = (uint8)(IINCHIP_READ(UIPR2));
		258	addr[3] = (uint8)(IINCHIP_READ(UIPR3));
		259	}
		260
		261	uint16 getUPORTR(void)
		262	{
		263	uint16 ret;
		264	ret = IINCHIP_READ(UPORTR0);
		265	ret = (ret << 8) + IINCHIP_READ(UPORTR1);
		266	return ret;
		267	}
		268
		269	uint16 getFMTUR(void)
		270	{
		271	uint16 ret;
		272	ret = IINCHIP_READ(FMTUR0);
		273	ret = (ret << 8) + IINCHIP_READ(FMTUR1);
		274	return ret;
		275	}
		276
		277
		278	/* PIN "BRYDn" */
		279
		280	uint8 getPn_BRDYR(uint8 p)
		281	{
		282	return (uint8)IINCHIP_READ(Pn_BRDYR1(p));
		283	}
		284	void setPn_BRDYR(uint8 p, uint8 cfg)
		285	{
		286	IINCHIP_WRITE(Pn_BRDYR1(p),cfg);
		287	}
		288
		289
		290	uint16 getPn_BDPTHR(uint8 p)
		291	{
		292	uint16 ret;
		293	ret = IINCHIP_READ(Pn_BDPTHR0(p));
		294	ret = (ret << 8) + IINCHIP_READ(Pn_BDPTHR1(p));
		295	return ret;
		296	}
		297
		298	void setPn_BDPTHR(uint8 p, uint16 depth)
		299	{
		300	IINCHIP_WRITE(Pn_BDPTHR0(p), (uint8)(depth >> 8));
		301	IINCHIP_WRITE(Pn_BDPTHR1(p), (uint8)(depth & 0xff));
		302	}
		303
		304
		305	/* IINCHIP ID */
		306	uint16 getIDR(void)
		307	{
		308	uint16 ret;
		309	ret = IINCHIP_READ(IDR0);
		310	ret = (ret << 8) + IINCHIP_READ(IDR1);
		311	return ret;
		312	}
		313
		314
		315	/***********************************
		316	* SOCKET Register Access Function *
		317	***********************************/
		318
		319	/* SOCKET control */
		320
		321	uint16 getSn_MR(SOCKET s)
		322	{
		323	uint16 ret;
		324	ret = IINCHIP_READ(Sn_MR0(s));
		325	ret = (ret << 8) + IINCHIP_READ(Sn_MR1(s));
		326	return ret;
		327	}
		328	void setSn_MR(SOCKET s, uint16 mode)
		329	{
		330	IINCHIP_WRITE(Sn_MR0(s), (uint8)(mode >> 8));
		331	IINCHIP_WRITE(Sn_MR1(s), (uint8)(mode & 0xff));
		332	}
		333
		334	uint8 getSn_CR(SOCKET s)
		335	{
		336	return IINCHIP_READ(Sn_CR1(s));
		337	}
		338
		339	void setSn_CR(SOCKET s, uint8 com)
		340	{
		341	IINCHIP_WRITE(Sn_CR1(s), (uint8)(com & 0xff));
		342	while(IINCHIP_READ(Sn_CR1(s))); // wait until Sn_CR is cleared.
		343	}
		344
		345	uint8 getSn_IMR(SOCKET s)
		346	{
		347	return (uint8)IINCHIP_READ(Sn_IMR1(s));
		348	}
		349
		350	void setSn_IMR(SOCKET s, uint8 mask)
		351	{
		352	IINCHIP_WRITE(Sn_IMR1(s),mask);
		353	}
		354
		355	uint8 getSn_IR(SOCKET s)
		356	{
		357	#ifdef __DEF_IINCHIP_INT__ // In case of using ISR routine of iinchip
		358	return SOCK_INT[s];
		359	#else // In case of processing directly
		360	return (uint8)IINCHIP_READ(Sn_IR1(s));
		361	#endif
		362	}
		363
		364	void setSn_IR(SOCKET s, uint8 ir)
		365	{
		366	#ifdef __DEF_IINCHIP_INT__ // In case of using ISR routine of iinchip
		367	SOCK_INT[s] = SOCK_INT[s] & ~(ir);
		368	#else // In case of processing directly
		369	IINCHIP_WRITE(Sn_IR1(s),ir);
		370	#endif
		371	}
		372
		373
		374	/* SOCKET information */
		375
		376	uint8 getSn_SSR(SOCKET s)
		377	{
		378	uint8 ssr, ssr1;
		379	ssr = (uint8)IINCHIP_READ(Sn_SSR1(s)); // first read
		380
		381	while(1)
		382	{
		383	ssr1 = (uint8)IINCHIP_READ(Sn_SSR1(s)); // second read
		384	if(ssr == ssr1) break; // if first == sencond, Sn_SSR value is valid.
		385	ssr = ssr1; // if first <> second, save second value into first.
		386	}
		387	return ssr;
		388	}
		389
		390	void getSn_DHAR(SOCKET s, uint8* addr)
		391	{
		392	addr[0] = (uint8)(IINCHIP_READ(Sn_DHAR0(s)));
		393	addr[1] = (uint8)(IINCHIP_READ(Sn_DHAR1(s)));
		394	addr[2] = (uint8)(IINCHIP_READ(Sn_DHAR2(s)));
		395	addr[3] = (uint8)(IINCHIP_READ(Sn_DHAR3(s)));
		396	addr[4] = (uint8)(IINCHIP_READ(Sn_DHAR4(s)));
		397	addr[5] = (uint8)(IINCHIP_READ(Sn_DHAR5(s)));
		398	}
		399
		400	void setSn_DHAR(SOCKET s, uint8* addr)
		401	{
		402	IINCHIP_WRITE(Sn_DHAR0(s), (uint8)(addr[0]));
		403	IINCHIP_WRITE(Sn_DHAR1(s), (uint8)(addr[1]));
		404	IINCHIP_WRITE(Sn_DHAR2(s), (uint8)(addr[2]));
		405	IINCHIP_WRITE(Sn_DHAR3(s), (uint8)(addr[3]));
		406	IINCHIP_WRITE(Sn_DHAR4(s), (uint8)(addr[4]));
		407	IINCHIP_WRITE(Sn_DHAR5(s), (uint8)(addr[5]));
		408	}
		409
		410	// M_15052008 : Delete this function
		411	//uint16 getSn_DPORTR(SOCKET s)
		412	//{
		413	// return IINCHIP_READ(Sn_DPORTR(s));
		414	//}
		415
		416
		417	void setSn_DPORTR(SOCKET s, uint16 port)
		418	{
		419	IINCHIP_WRITE(Sn_DPORTR0(s), (uint8)(port >>8));
		420	IINCHIP_WRITE(Sn_DPORTR1(s), (uint8)(port & 0xff));
		421	}
		422
		423	void getSn_DIPR(SOCKET s, uint8* addr)
		424	{
		425	addr[0] = (uint8)(IINCHIP_READ(Sn_DIPR0(s)));
		426	addr[1] = (uint8)(IINCHIP_READ(Sn_DIPR1(s)));
		427	addr[2] = (uint8)(IINCHIP_READ(Sn_DIPR2(s)));
		428	addr[3] = (uint8)(IINCHIP_READ(Sn_DIPR3(s)));
		429	}
		430
		431	void setSn_DIPR(SOCKET s, uint8* addr)
		432	{
		433	IINCHIP_WRITE(Sn_DIPR0(s), (uint8)addr[0]);
		434	IINCHIP_WRITE(Sn_DIPR1(s), (uint8)addr[1]);
		435	IINCHIP_WRITE(Sn_DIPR2(s), (uint8)addr[2]);
		436	IINCHIP_WRITE(Sn_DIPR3(s), (uint8)addr[3]);
		437	}
		438
		439	uint16 getSn_MSSR(SOCKET s)
		440	{
		441	uint16 ret;
		442	ret = IINCHIP_READ(Sn_MSSR0(s));
		443	ret = (ret << 8) + IINCHIP_READ(Sn_MSSR1(s));
		444	return ret;
		445	}
		446
		447	void setSn_MSSR(SOCKET s, uint16 mss)
		448	{
		449	IINCHIP_WRITE(Sn_MSSR0(s), (uint8)(mss >> 8));
		450	IINCHIP_WRITE(Sn_MSSR1(s), (uint8)(mss & 0xff));
		451	}
		452
		453
		454	/* SOCKET communication */
		455
		456	uint8 getSn_KPALVTR(SOCKET s)
		457	{
		458	return IINCHIP_READ(Sn_KPALVTR(s));
		459	}
		460
		461	void setSn_KPALVTR(SOCKET s, uint8 time)
		462	{
		463	IINCHIP_WRITE(Sn_KPALVTR(s), time);
		464	}
		465
		466	uint32 getSn_TX_WRSR(SOCKET s)
		467	{
		468	uint32 ret;
		469	ret = IINCHIP_READ(Sn_TX_WRSR0(s));
		470	ret = (ret << 8) + IINCHIP_READ(Sn_TX_WRSR1(s));
		471	ret = (ret << 8) + IINCHIP_READ(Sn_TX_WRSR2(s));
		472	ret = (ret << 8) + IINCHIP_READ(Sn_TX_WRSR3(s));
		473	return ret;
		474	}
		475	void setSn_TX_WRSR(SOCKET s, uint32 size)
		476	{
		477	IINCHIP_WRITE(Sn_TX_WRSR0(s), (uint8)(size >> 24));
		478	IINCHIP_WRITE(Sn_TX_WRSR1(s), (uint8)(size >> 16));
		479	IINCHIP_WRITE(Sn_TX_WRSR2(s), (uint8)(size >> 8));
		480	IINCHIP_WRITE(Sn_TX_WRSR3(s), (uint8)(size & 0xff));
		481	}
		482
		483	uint32 getSn_TX_FSR(SOCKET s)
		484	{
		485	uint32 free_tx_size=0;
		486	uint32 free_tx_size1=0;
		487	while(1)
		488	{
		489	free_tx_size = IINCHIP_READ(Sn_TX_FSR0(s)); // read
		490	free_tx_size = (free_tx_size << 8) + IINCHIP_READ(Sn_TX_FSR1(s));
		491	free_tx_size = (free_tx_size << 8) + IINCHIP_READ(Sn_TX_FSR2(s));
		492	free_tx_size = (free_tx_size << 8) + IINCHIP_READ(Sn_TX_FSR3(s));
		493	if(free_tx_size == free_tx_size1) break; // if first == sencond, Sn_TX_FSR value is valid.
		494	free_tx_size1 = free_tx_size; // save second value into first
		495	}
		496	return free_tx_size;
		497	}
		498
		499	uint32 getSn_RX_RSR(SOCKET s)
		500	{
		501	uint32 received_rx_size=0;
		502	uint32 received_rx_size1=1;
		503	while(1)
		504	{
		505	received_rx_size = IINCHIP_READ(Sn_RX_RSR0(s));
		506	received_rx_size = (received_rx_size << 8) + IINCHIP_READ(Sn_RX_RSR1(s)); // read
		507	received_rx_size = (received_rx_size << 8) + IINCHIP_READ(Sn_RX_RSR2(s));
		508	received_rx_size = (received_rx_size << 8) + IINCHIP_READ(Sn_RX_RSR3(s));
		509	if(received_rx_size == received_rx_size1) break;
		510	received_rx_size1 = received_rx_size; // if first == sencond, Sn_RX_RSR value is valid.
		511	} // save second value into first
		512	return received_rx_size;
		513	}
		514
		515
		516	void setSn_TX_FIFOR(SOCKET s, uint16 data)
		517	{
		518	IINCHIP_WRITE(Sn_TX_FIFOR0(s), (uint8)(data >> 8));
		519	IINCHIP_WRITE(Sn_TX_FIFOR1(s), (uint8)(data & 0xff));
		520	}
		521
		522	uint16 getSn_RX_FIFOR(SOCKET s)
		523	{
		524	uint16 ret;
		525	ret = IINCHIP_READ(Sn_RX_FIFOR0(s));
		526	ret = (ret << 8) + IINCHIP_READ(Sn_RX_FIFOR1(s));
		527	return ret;
		528	}
		529
		530
		531	/* IP header field */
		532
		533	uint8 getSn_PROTOR(SOCKET s)
		534	{
		535	return (uint8)IINCHIP_READ(Sn_PROTOR(s));
		536	}
		537	void setSn_PROTOR(SOCKET s, uint8 pronum)
		538	{
		539	IINCHIP_WRITE(Sn_PROTOR(s), pronum);
		540	}
		541
		542	uint8 getSn_TOSR(SOCKET s)
		543	{
		544	return (uint8)IINCHIP_READ(Sn_TOSR1(s));
		545	}
		546	void setSn_TOSR(SOCKET s, uint8 tos)
		547	{
		548	IINCHIP_WRITE(Sn_TOSR1(s),tos);
		549	}
		550
		551	uint8 getSn_TTLR(SOCKET s)
		552	{
		553	return (uint8)IINCHIP_READ(Sn_TTLR1(s));
		554	}
		555	void setSn_TTLR(SOCKET s, uint8 ttl)
		556	{
		557	IINCHIP_WRITE(Sn_TTLR1(s),ttl);
		558	}
		559
		560	uint8 getSn_FRAGR(SOCKET s)
		561	{
		562	return (uint8)IINCHIP_READ(Sn_FRAGR1(s));
		563	}
		564
		565	void setSn_FRAGR(SOCKET s, uint8 frag)
		566	{
		567	IINCHIP_WRITE(Sn_FRAGR1(s),frag);
		568	}
		569
		570
		571	/*******
		572	* ETC *
		573	*******/
		574
		575	/* Initialization & Interrupt request routine */
		576
		577	void iinchip_init(void)
		578	{
		579	((uint8)MR) = MR_RST;
		580	wait_1ms(5);
		581	#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_INDIRECT_MODE__)
		582	((vint8)MR) \|= MR_IND;
		583	#ifdef __DEF_IINCHIP_DBG__
		584	printf("MR value is %04x\r\n",((vuint16)MR));
		585	#endif
		586	#endif
		587	}
		588
		589	//This statement is commented for using 'Doxygen'.
		590	//#ifdef __DEF_IINCHIP_INT__
		591	void iinchip_irq(void)
		592	{
		593	uint16 int_val;
		594	uint16 idx;
		595	IINCHIP_CRITICAL_SECTION_ENTER();
		596	// M_01052008 : replaced '==' with '='
		597	//while(int_val == IINCHIP_READ(IR)) // process all interrupt
		598	while((int_val = ((IINCHIP_READ(IR0) << 8) \| IINCHIP_READ(IR1)))) // process all interrupt
		599	{
		600	for(idx = 0 ; idx < MAX_SOCK_NUM ; idx++)
		601	{
		602	if (int_val & IR_SnINT(idx)) // check the SOCKETn interrupt
		603	{
		604	SOCK_INT[idx] \|= (uint8)IINCHIP_READ(Sn_IR1(idx)); // Save the interrupt stauts to SOCK_INT[idx]
		605	IINCHIP_WRITE(Sn_IR1(idx),SOCK_INT[idx]); // Clear the interrupt status bit of SOCKETn
		606	}
		607	}
		608
		609	if (int_val & (IR_IPCF << 8)) // check the IP conflict interrupt
		610	{
		611	printf("IP conflict : %04x\r\n", int_val);
		612	}
		613	if (int_val & (IR_DPUR << 8)) // check the unreachable destination interrupt
		614	{
		615	printf("INT Port Unreachable : %04x\r\n", int_val);
		616	printf("UIPR : %d.%d.%d.%d\r\n", IINCHIP_READ(UIPR0),
		617	IINCHIP_READ(UIPR1),
		618	IINCHIP_READ(UIPR2),
		619	IINCHIP_READ(UIPR3));
		620	printf("UPORTR : %02x%02x\r\n", IINCHIP_READ(UPORTR0),IINCHIP_READ(UPORTR1));
		621	}
		622	IINCHIP_WRITE(IR0, (uint8)(int_val >> 8));
		623	}
		624	IINCHIP_CRITICAL_SECTION_EXIT();
		625	}
		626	//This statement is commented for using 'Doxygen'.
		627	//#endif
		628
		629
		630	/* Internal memory operation */
		631
		632	uint8 sysinit(uint8* tx_size, uint8* rx_size)
		633	{
		634	uint16 i;
		635	uint16 ssum=0,rsum=0;
		636	uint mem_cfg = 0;
		637
		638	for(i=0; i < MAX_SOCK_NUM; i++)
		639	{
		640	if(tx_size[i] > 64)
		641	{
		642	#ifdef __DEF_IINCHIP_DBG__
		643	printf("Illegal Channel(%d) TX Memory Size.\r\n",i);
		644	#endif
		645	return 0;
		646	}
		647	if(rx_size[i] > 64)
		648	{
		649	#ifdef __DEF_IINCHIP_DBG__
		650	printf("Illegal Channel(%d) RX Memory Size.\r\n",i);
		651	#endif
		652	return 0;
		653	}
		654	ssum += (uint16)tx_size[i];
		655	rsum += (uint16)rx_size[i];
		656	TXMEM_SIZE[i] = ((uint32)tx_size[i]) << 10;
		657	RXMEM_SIZE[i] = ((uint32)rx_size[i]) << 10;
		658	}
		659	if( (ssum % 8) \|\| ((ssum + rsum) != 128) )
		660	{
		661	#ifdef __DEF_IINCHIP_DBG__
		662	printf("Illegal Memory Allocation\r\n");
		663	#endif
		664	return 0;
		665	}
		666
		667	IINCHIP_WRITE(TMSR0,tx_size[0]);
		668	IINCHIP_WRITE(TMSR1,tx_size[1]);
		669	IINCHIP_WRITE(TMSR2,tx_size[2]);
		670	IINCHIP_WRITE(TMSR3,tx_size[3]);
		671	IINCHIP_WRITE(TMSR4,tx_size[4]);
		672	IINCHIP_WRITE(TMSR5,tx_size[5]);
		673	IINCHIP_WRITE(TMSR6,tx_size[6]);
		674	IINCHIP_WRITE(TMSR7,tx_size[7]);
		675
		676	IINCHIP_WRITE(RMSR0,rx_size[0]);
		677	IINCHIP_WRITE(RMSR1,rx_size[1]);
		678	IINCHIP_WRITE(RMSR2,rx_size[2]);
		679	IINCHIP_WRITE(RMSR3,rx_size[3]);
		680	IINCHIP_WRITE(RMSR4,rx_size[4]);
		681	IINCHIP_WRITE(RMSR5,rx_size[5]);
		682	IINCHIP_WRITE(RMSR6,rx_size[6]);
		683	IINCHIP_WRITE(RMSR7,rx_size[7]);
		684
		685	for(i=0; i <ssum/8 ; i++)
		686	{
		687	mem_cfg <<= 1;
		688	mem_cfg \|= 1;
		689	}
		690
		691	IINCHIP_WRITE(MTYPER,(uint8)(mem_cfg >> 8));
		692	IINCHIP_WRITE(MTYPER1,(uint8)(mem_cfg & 0xff));
		693
		694	#ifdef __DEF_IINCHIP_DBG__
		695	printf("Total TX Memory Size = %dKB\r\n",ssum);
		696	printf("Total RX Memory Size = %dKB\r\n",rsum);
		697	printf("Ch : TX SIZE : RECV SIZE\r\n");
		698	printf("%02d : %07dKB : %07dKB \r\n", 0, IINCHIP_READ(TMSR0),IINCHIP_READ(RMSR0));
		699	printf("%02d : %07dKB : %07dKB \r\n", 1, IINCHIP_READ(TMSR1),IINCHIP_READ(RMSR1));
		700	printf("%02d : %07dKB : %07dKB \r\n", 2, IINCHIP_READ(TMSR2),IINCHIP_READ(RMSR2));
		701	printf("%02d : %07dKB : %07dKB \r\n", 3, IINCHIP_READ(TMSR3),IINCHIP_READ(RMSR3));
		702	printf("%02d : %07dKB : %07dKB \r\n", 4, IINCHIP_READ(TMSR4),IINCHIP_READ(RMSR4));
		703	printf("%02d : %07dKB : %07dKB \r\n", 5, IINCHIP_READ(TMSR5),IINCHIP_READ(RMSR5));
		704	printf("%02d : %07dKB : %07dKB \r\n", 6, IINCHIP_READ(TMSR6),IINCHIP_READ(RMSR6));
		705	printf("%02d : %07dKB : %07dKB \r\n", 7, IINCHIP_READ(TMSR7),IINCHIP_READ(RMSR7));
		706	printf("\r\nMTYPER=%02x%02x\r\n",IINCHIP_READ(MTYPER0),IINCHIP_READ(MTYPER1));
		707	#endif
		708
		709	return 1;
		710	}
		711
		712	uint32 wiz_write_buf(SOCKET s,uint8* buf,uint32 len)
		713	{
		714	#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
		715	#if (__DEF_IINCHIP_BUF_OP__ == __DEF_C__)
		716	uint32 idx=0;
		717	// M_08082008
		718	IINCHIP_CRITICAL_SECTION_ENTER();
		719	for (idx = 0; idx < len; idx+=2)
		720	{
		721	((vuint8)Sn_TX_FIFOR0(s)) = *(buf+idx);
		722	((vuint8)Sn_TX_FIFOR1(s)) = *(buf+idx+1);
		723	}
		724	// M_08082008
		725	IINCHIP_CRITICAL_SECTION_EXIT();
		726	#elif (__DEF_IINCHIP_BUF_OP__ == __DEF_MCU_DEP_DMA__)
		727	#error "You should do implement this block."
		728	#endif
		729	#elif (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_INDIRECT_MODE__)
		730	#if (__DEF_IINCHIP_BUF_OP__ == __DEF_C__) */
		731	uint32 idx=0;
		732	IINCHIP_CRITICAL_SECTION_ENTER();
		733	((vuint8)IDM_AR0) = Sn_TX_FIFOR0(s);
		734	((vuint8)IDM_AR1) = Sn_TX_FIFOR1(s);
		735	for (idx = 0; idx < len; idx+=2)
		736	{
		737	((vuint8)IDM_DR0) = ((uint8)(buf+idx));
		738	((vuint8)IDM_DR1) = ((uint8)(buf+idx+1));
		739	}
		740	IINCHIP_CRITICAL_SECTION_EXIT();
		741	#elif (__DEF_IINCHIP_BUF_OP__ == __DEF_MCU_DEP_DMA__)
		742	#error "You should do implement this block."
		743	#else
		744	#error "Undefined __DEF_IINCHIP_BUF_OP__"
		745	#endif
		746	#else
		747	#error "Undefined __DEF_IINCHIP_ADDRESS_MODE__"
		748	#endif
		749	return len;
		750	}
		751
		752	uint32 wiz_read_buf(SOCKET s, uint8* buf,uint32 len)
		753	{
		754	#if (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_DIRECT_MODE__)
		755	#if (__DEF_IINCHIP_BUF_OP__ == __DEF_C__)
		756	uint32 idx;
		757	// M_08082008
		758	IINCHIP_CRITICAL_SECTION_ENTER();
		759	for (idx = 0; idx < len; idx+=2)
		760	{
		761	(buf+idx) = ((vuint8*)Sn_RX_FIFOR0(s));
		762	(buf+idx+1) = ((vuint8*)Sn_RX_FIFOR1(s));
		763	}
		764	// M_08082008
		765	IINCHIP_CRITICAL_SECTION_EXIT();
		766	#elif (__DEF_IINCHIP_BUF_OP__ == __DEF_MCU_DEP_DMA__)
		767	#error "You should do implement this block."
		768	#else
		769	#error "Undefined __DEF_IINCHIP_BUF_OP__"
		770	#endif
		771	#elif (__DEF_IINCHIP_ADDRESS_MODE__ == __DEF_IINCHIP_INDIRECT_MODE__)
		772	#if (__DEF_IINCHIP_BUF_OP__ == __DEF_C__) */
		773	uint32 idx=0;
		774	IINCHIP_CRITICAL_SECTION_ENTER();
		775	((vuint8)IDM_AR0) = Sn_RX_FIFOR0(s);
		776	((vuint8)IDM_AR1) = Sn_RX_FIFOR1(s);
		777	for (idx = 0; idx < len; idx+=2)
		778	{
		779	((uint8)(buf+idx)) = ((vuint8)IDM_DR0);
		780	((uint8)(buf+idx+1)) = ((vuint8)IDM_DR1);
		781	}
		782	IINCHIP_CRITICAL_SECTION_EXIT();
		783	#elif (__DEF_IINCHIP_BUF_OP__ == __DEF_MCU_DEP_DMA__)
		784	#error "You should do implement this block."
		785	#else
		786	#error "Undefined __DEF_IINCHIP_BUF_OP__"
		787	#endif
		788	#else
		789	#error "Undefined __DEF_IINCHIP_ADDRESS_MODE__"
		790	#endif
		791	return len;
		792	}
		793
		794
		795	uint32 getIINCHIP_TxMAX(SOCKET s)
		796	{
		797	return TXMEM_SIZE[s];
		798	}
		799
		800	uint32 getIINCHIP_RxMAX(SOCKET s)
		801	{
		802	return RXMEM_SIZE[s];
		803	}
		804
		805
		806	// This statement is commented for using 'Doxygen'.
		807	//#ifdef __DEF_IINCHIP_PPP__
		808
		809	#define PPP_OPTION_BUF_LEN 64
		810
		811	uint8 pppinit_in(uint8 * id, uint8 idlen, uint8 * passwd, uint8 passwdlen)
		812	{
		813	uint8 loop_idx = 0;
		814	uint8 isr = 0;
		815	uint8 buf[PPP_OPTION_BUF_LEN];
		816	uint32 len;
		817	uint8 str[PPP_OPTION_BUF_LEN];
		818	uint8 str_idx,dst_idx;
		819
		820	// PHASE1. PPPoE Discovery //
		821	// start to connect pppoe connection
		822	printf("-- PHASE 1. PPPoE Discovery process --");
		823	printf(" ok\r\n");
		824	printf("\r\n");
		825	setSn_CR(0,Sn_CR_PCON);
		826	wait_10ms(100);
		827
		828	// check if PPPoE discovery phase is success or not
		829	loop_idx = 0;
		830	while (!(getSn_IR(0) & Sn_IR_PNEXT))
		831	{
		832	printf(".");
		833	if (loop_idx++ == 10) // timeout
		834	{
		835	printf("timeout before LCP\r\n");
		836	return 3;
		837	}
		838	wait_10ms(100);
		839	}
		840	setSn_IR(0,Sn_IR_PNEXT);
		841
		842	// PHASE2. LCP process //
		843	printf("-- PHASE 2. LCP process --");
		844	{
		845	// Magic number option
		846	// option format (type value + length value + data)
		847	// write magic number value
		848	buf[0] = 0x05; // type value
		849	buf[1] = 0x06; // length value
		850	buf[2] = 0x01; buf[3] = 0x01; buf[4] = 0x01; buf[5]= 0x01; // data
		851	// for MRU option, 1492 0x05d4
		852	// buf[6] = 0x01; buf[7] = 0x04; buf[8] = 0x05; buf[9] = 0xD4;
		853	}
		854	wiz_write_buf(0,buf, 0x06);
		855	setSn_TX_WRSR(0,0x06);
		856	setSn_CR(0,Sn_CR_PCR); // send LCP request to PPPoE server
		857	wait_10ms(100);
		858
		859	while (!((isr = getSn_IR(0)) & Sn_IR_PNEXT))
		860	{
		861	if (isr & Sn_IR_PRECV) // Not support option
		862	{
		863	len = getSn_RX_RSR(0);
		864	if ( len > 2 )
		865	{
		866	wiz_read_buf(0,str, 2);
		867	len = ((uint16)str[0] << 8) + str[1];
		868	wiz_read_buf(0,(str+2), len);
		869	setSn_CR(0,Sn_CR_RECV);
		870	// get option length
		871	len = (uint32)str[4]; len = ((len & 0xff) << 8) + (uint32)str[5];
		872	len += 2;
		873	str_idx = 6; dst_idx = 0; // PPP header is 6 byte, so starts at 6.
		874	do
		875	{
		876	if ((str[str_idx] == 0x01) \|\| (str[str_idx] == 0x02) \|\| (str[str_idx] == 0x03) \|\| (str[str_idx] == 0x05))
		877	{
		878	// skip as length of support option. str_idx+1 is option's length.
		879	str_idx += str[str_idx+1];
		880	}
		881	else
		882	{
		883	// not support option , REJECT
		884	memcpy((uint8 )(buf+dst_idx), (uint8 )(str+str_idx), str[str_idx+1]);
		885	dst_idx += str[str_idx+1]; str_idx += str[str_idx+1];
		886	}
		887	} while (str_idx != len);
		888
		889	// send LCP REJECT packet
		890	wiz_write_buf(0,buf, dst_idx);
		891	setSn_TX_WRSR(0,dst_idx);
		892	setSn_CR(0,Sn_CR_PCJ);
		893	setSn_IR(0,Sn_IR_PRECV);
		894	}
		895	}
		896	printf(".");
		897	if (loop_idx++ == 10) // timeout
		898	{
		899	printf("timeout after LCP\r\n");
		900	return 3;
		901	}
		902	wait_10ms(100);
		903	}
		904	setSn_IR(0,Sn_IR_PNEXT);
		905	printf(" ok\r\n");
		906	printf("\r\n");
		907
		908	// PHASE 3. PPPoE Authentication //
		909	printf("-- PHASE 3. PPPoE Authentication mode --\r\n");
		910	printf("Authentication protocol : %04x, ", getPATR());
		911	loop_idx = 0;
		912	if (getPATR() == 0xC023) // PAP type
		913	{
		914	printf("PAP\r\n"); // in case of adsl normally supports PAP.
		915	// send authentication data
		916	// copy (idlen + id + passwdlen + passwd)
		917	buf[loop_idx] = idlen; loop_idx++;
		918	memcpy((uint8 )(buf+loop_idx), (uint8 )(id), idlen); loop_idx += idlen;
		919	buf[loop_idx] = passwdlen; loop_idx++;
		920	memcpy((uint8 )(buf+loop_idx), (uint8 )(passwd), passwdlen); loop_idx += passwdlen;
		921	wiz_write_buf(0,buf, loop_idx);
		922	setSn_TX_WRSR(0,loop_idx);
		923	setSn_CR(0,Sn_CR_PCR);
		924	wait_10ms(100);
		925	}
		926	else if (getPATR() == 0xC223) // CHAP type
		927	{
		928	uint8 chal_len;
		929	md5_ctx context;
		930	uint8 digest[16];
		931
		932	len = getSn_RX_RSR(0);
		933	if ( len > 2 )
		934	{
		935	wiz_read_buf(0,str,2);
		936	len = ((uint32)str[0] << 8) + (uint32)str[1];
		937	wiz_read_buf(0, str, len);
		938	setSn_CR(0,Sn_CR_RECV);
		939	#ifdef __DEF_IINCHIP_DBG__
		940	{
		941	int16 i;
		942	printf("recv CHAP\r\n");
		943	for (i = 0; i < 32; i++) printf ("%02X ", str[i]);
		944	printf("\r\n");
		945	}
		946	#endif
		947	// str is C2 23 xx CHAL_ID xx xx CHAP_LEN CHAP_DATA
		948	// index 0 1 2 3 4 5 6 7 ...
		949
		950	memset(buf,0x00,64);
		951	buf[loop_idx] = str[3]; loop_idx++; // chal_id
		952	memcpy((uint8 )(buf+loop_idx), (uint8 )(passwd), passwdlen); loop_idx += passwdlen; //passwd
		953	chal_len = str[6]; // chal_id
		954	memcpy((uint8 )(buf+loop_idx), (uint8 )(str+7), chal_len); loop_idx += chal_len; //challenge
		955	buf[loop_idx] = 0x80;
		956	#ifdef __DEF_IINCHIP_DBG__
		957	{
		958	int16 i;
		959	printf("CHAP proc d1\r\n");
		960
		961	for (i = 0; i < 64; i++) printf ("%02X ", buf[i]);
		962	printf("\r\n");
		963	}
		964	#endif
		965
		966	md5_init(&context);
		967	md5_update(&context, buf, loop_idx);
		968	md5_final(digest, &context);
		969
		970	#ifdef __DEF_IINCHIP_DBG__
		971	{
		972	uint i;
		973	printf("CHAP proc d1\r\n");
		974	for (i = 0; i < 16; i++) printf ("%02X", digest[i]);
		975	printf("\r\n");
		976	}
		977	#endif
		978	loop_idx = 0;
		979	buf[loop_idx] = 16; loop_idx++; // hash_len
		980	memcpy((uint8 )(buf+loop_idx), (uint8 )(digest), 16); loop_idx += 16; // hashed value
		981	memcpy((uint8 )(buf+loop_idx), (uint8 )(id), idlen); loop_idx += idlen; // id
		982	wiz_write_buf(0,buf, loop_idx);
		983	setSn_TX_WRSR(0,loop_idx);
		984	setSn_CR(0,Sn_CR_PCR);
		985	wait_10ms(100);
		986	}
		987	}
		988	else
		989	{
		990	printf("Not support\r\n");
		991	#ifdef __DEF_IINCHIP_DBG__
		992	printf("Not support PPP Auth type: %.4x\r\n",getPATR());
		993	#endif
		994	return 4;
		995	}
		996	printf("\r\n");
		997
		998	printf("-- Waiting for PPPoE server's admission --");
		999	loop_idx = 0;
		1000	while (!((isr = getSn_IR(0)) & Sn_IR_PNEXT))
		1001	{
		1002	if (isr & Sn_IR_PFAIL)
		1003	{
		1004	printf("failed\r\nReinput id, password..\r\n");
		1005	return 2;
		1006	}
		1007	printf(".");
		1008	if (loop_idx++ == 10) // timeout
		1009	{
		1010	printf("timeout after PAP\r\n");
		1011	return 3;
		1012	}
		1013	wait_10ms(100);
		1014	}
		1015	setSn_IR(0,Sn_IR_PNEXT);
		1016	printf("ok\r\n");
		1017	printf("\r\n");
		1018
		1019	// PHASE 4. IPCP process //
		1020	printf("-- PHASE 4. IPCP process --");
		1021	// IP Address
		1022	buf[0] = 0x03; buf[1] = 0x06; buf[2] = 0x00; buf[3] = 0x00; buf[4] = 0x00; buf[5] = 0x00;
		1023	wiz_write_buf(0,buf, 6);
		1024	setSn_TX_WRSR(0,6);
		1025	setSn_CR(0,Sn_CR_PCR);
		1026	wait_10ms(100);
		1027
		1028	loop_idx = 0;
		1029	while (1)
		1030	{
		1031	if (getSn_IR(0) & Sn_IR_PRECV)
		1032	{
		1033	len = getSn_RX_RSR(0);
		1034	if ( len > 2 )
		1035	{
		1036	wiz_read_buf(0,str,2);
		1037	len = ((uint32)str[0] << 8) + (uint32)str[1];
		1038	wiz_read_buf(0, str, len);
		1039	setSn_CR(0,Sn_CR_RECV);
		1040	str_idx = 6; dst_idx = 0;
		1041	if (str[2] == 0x03) // in case of NAK
		1042	{
		1043	do
		1044	{
		1045	if (str[str_idx] == 0x03) // request only ip information
		1046	{
		1047	memcpy((uint8 )(buf+dst_idx), (uint8 )(str+str_idx), str[str_idx+1]);
		1048	dst_idx += str[str_idx+1]; str_idx += str[str_idx+1];
		1049	}
		1050	else
		1051	{
		1052	// skip byte
		1053	str_idx += str[str_idx+1];
		1054	}
		1055	// for debug
		1056	//printf("s: %d, d: %d, l: %d", str_idx, dst_idx, len);
		1057	} while (str_idx != len);
		1058	wiz_write_buf(0,buf, dst_idx);
		1059	setSn_TX_WRSR(0,dst_idx);
		1060	setSn_CR(0,Sn_CR_PCR); // send ipcp request
		1061	wait_10ms(100);
		1062	break;
		1063	}
		1064	}
		1065	setSn_IR(0,Sn_IR_PRECV);
		1066	}
		1067	printf(".");
		1068	if (loop_idx++ == 10) // timeout
		1069	{
		1070	printf("timeout after IPCP\r\n");
		1071	return 3;
		1072	}
		1073	wait_10ms(100);
		1074	wiz_write_buf(0, buf, 6);
		1075	setSn_TX_WRSR(0,6);
		1076	setSn_CR(0,Sn_CR_PCR); //ipcp re-request
		1077	}
		1078
		1079	loop_idx = 0;
		1080	while (!(getSn_IR(0) & Sn_IR_PNEXT))
		1081	{
		1082	printf(".");
		1083	if (loop_idx++ == 10) // timeout
		1084	{
		1085	printf("timeout after IPCP NAK\r\n");
		1086	return 3;
		1087	}
		1088	wait_10ms(100);
		1089	setSn_CR(0,Sn_CR_PCR); // send ipcp request
		1090	}
		1091	setSn_IR(0,Sn_IR_PNEXT);
		1092	printf("ok\r\n");
		1093	printf("\r\n");
		1094	return 1;
		1095	// after this function, the pppoe server's mac address and pppoe session id is saved in PHAR and PSIDR repectly.
		1096	}
		1097
		1098	uint8 pppinit(uint8 id, uint8 idlen, uint8 passwd, uint8 passwdlen)
		1099	{
		1100	uint8 ret;
		1101	uint8 isr;
		1102
		1103	// PHASE0. PPPoE setup
		1104
		1105	printf("-- PHASE 0. PPPoE setup process --\r\n");
		1106	printf("\r\n");
		1107	setMR(getMR()\|MR_PPPoE); // set PPPoE mode
		1108	setMR(getMR()\|MR_FS); // If little-endian, set MR_FS. Otherwise, comment.
		1109
		1110	isr = getSn_IR(0);
		1111	setSn_IR(0,isr); // clear the previous value of Sn_IR(0)
		1112
		1113	setPTIMER(200); // set LPC request time to 5 seconds
		1114	setPMAGICR(0x01); // set the magic number
		1115	setSn_MR(0, Sn_MR_PPPoE); // set Sn_MR(0) to PPPoE mode
		1116	setSn_CR(0,Sn_CR_OPEN); //open SOCKET0 with PPPoE mode
		1117
		1118	ret = pppinit_in(id, idlen, passwd, passwdlen); // process the PPPoE message
		1119
		1120	setSn_CR(0, Sn_CR_CLOSE); // close PPPoE SOCKET0
		1121
		1122	return ret;
		1123	}
		1124
		1125	void pppterm(uint8 *mac, uint16 sessionid)
		1126	{
		1127	uint8 isr;
		1128	#ifdef __DEF_IINCHIP_DBG__
		1129	printf("pppterm()\r\n");
		1130	#endif
		1131
		1132	// set PPPoE mode
		1133	setMR(getMR() \| MR_PPPoE);
		1134
		1135	// set pppoe server's mac address and session id
		1136	// must be setted these value.
		1137	setSn_DHAR(0, mac);
		1138	setSn_DPORTR(0,sessionid);
		1139
		1140	// clear the previous value of Sn_IR(0)
		1141	isr = getSn_IR(0);
		1142	setSn_IR(0,isr);
		1143
		1144	//open SOCKET0 with PPPoE mode
		1145	setSn_MR(0, Sn_MR_PPPoE);
		1146	setSn_CR(0,Sn_CR_OPEN);
		1147	while(getSn_SSR(0) != SOCK_PPPoE)
		1148
		1149	// close PPPoE connection
		1150	setSn_CR(0,Sn_CR_PDISCON);
		1151	wait_10ms(100);
		1152	// close socket
		1153	setSn_CR(0,Sn_CR_CLOSE);
		1154
		1155	#ifdef __DEF_IINCHIP_DBG__
		1156	printf("pppterm() end ..\r\n");
		1157	#endif
		1158	}
		1159	// This statement is commented for using 'Doxygen'.
		1160	//#endif
		1161
		1162
		1163	void wait_1us(uint32 us)
		1164	{
		1165	uint32 i,j;
		1166	for(i = 0; i < us ; i++)
		1167	{
		1168	for(j = 0; j < 100; j++);
		1169	}
		1170	}
		1171
		1172	void wait_1ms(uint32 ms)
		1173	{
		1174	uint32 i;
		1175	for(i = 0; i < ms ; i++)
		1176	{
		1177	wait_1us(1000);
		1178	}
		1179
		1180	}
		1181
		1182	void wait_10ms(uint32 ms)
		1183	{
		1184	uint32 i;
		1185	for(i = 0; i < ms ; i++)
		1186	{
		1187	wait_1ms(10);
		1188	}
		1189	}
		1190
		1191

Subversion Repositories zxusbnet

(root)//branches/clkfix/drivers/W5300_Drv_V1.2.2/w5300.c – Rev 66