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Rev | Author | Line No. | Line |
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16 | lvd | 1 | // ZXiznet project |
2 | // (c) NedoPC 2012 |
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3 | // |
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4 | // test module for sl811 |
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5 | // tests whether transactions going for it are correct |
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6 | |||
7 | module sl811 |
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8 | ( |
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9 | input wire rst_n, |
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10 | input wire a0, |
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11 | input wire cs_n, |
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12 | input wire rd_n, |
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13 | input wire wr_n, |
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14 | input wire ms, |
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28 | lvd | 15 | output reg intrq, |
16 | inout wire [7:0] d |
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16 | lvd | 17 | ); |
18 | |||
19 | |||
20 | reg access_addr; |
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21 | reg access_rnw; |
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29 | lvd | 22 | reg [7:0] wr_data; |
23 | reg [7:0] rd_data; |
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16 | lvd | 24 | |
25 | wire rd = ~(cs_n|rd_n); |
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26 | wire wr = ~(cs_n|wr_n); |
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27 | |||
28 | |||
29 | initial |
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30 | begin |
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31 | intrq = 1'b0; |
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32 | end |
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33 | |||
34 | |||
35 | |||
36 | always @(negedge rd) |
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37 | begin |
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29 | lvd | 38 | access_addr <= a0; |
39 | access_rnw <= 1'b1; |
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16 | lvd | 40 | end |
41 | |||
29 | lvd | 42 | assign d = rd ? rd_data : 8'bZZZZ_ZZZZ; |
43 | |||
44 | |||
45 | |||
16 | lvd | 46 | always @(negedge wr) |
47 | begin |
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29 | lvd | 48 | access_addr <= a0; |
49 | access_rnw <= 1'b0; |
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50 | wr_data <= d; |
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16 | lvd | 51 | end |
52 | |||
53 | |||
54 | |||
55 | |||
56 | |||
57 | task set_intrq |
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58 | ( |
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59 | input new_intrq |
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60 | ); |
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61 | intrq = new_intrq; |
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62 | |||
63 | endtask |
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29 | lvd | 64 | |
16 | lvd | 65 | |
66 | function get_rst_n; |
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67 | |||
68 | get_rst_n = rst_n; |
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69 | |||
70 | endfunction |
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71 | |||
72 | |||
73 | function get_ms; |
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74 | |||
75 | get_ms = ms; |
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76 | |||
77 | endfunction |
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78 | |||
29 | lvd | 79 | |
80 | function get_addr; |
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81 | |||
82 | get_addr = access_addr; |
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83 | |||
84 | endfunction |
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85 | |||
86 | |||
87 | function get_rnw; |
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88 | |||
89 | get_rnw = access_rnw; |
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90 | |||
91 | endfunction |
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92 | |||
93 | |||
94 | function [7:0] get_wr_data; |
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95 | |||
96 | get_wr_data = wr_data; |
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97 | |||
98 | endfunction |
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99 | |||
100 | |||
101 | task set_rd_data( input [7:0] data ); |
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102 | |||
103 | rd_data = data; |
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104 | |||
105 | endtask |
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106 | |||
107 | |||
16 | lvd | 108 | |
109 | |||
110 | endmodule |
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111 |