Subversion Repositories pentevo

/* code3203x.c */

/*****************************************************************************/

/* SPDX-License-Identifier: GPL-2.0-only OR GPL-3.0-only                     */

/*                                                                           */

/* AS-Portierung                                                             */

/*                                                                           */

/* Codegenerator TMS320C3x/C4x-Familie                                       */

/*                                                                           */

/*****************************************************************************/

#include "stdinc.h"

#include <ctype.h>

#include <string.h>

#include "nls.h"

#include "be_le.h"

#include "bpemu.h"

#include "strutil.h"

#include "chunks.h"

#include "asmdef.h"

#include "asmsub.h"

#include "asmpars.h"

#include "asmcode.h"

#include "asmitree.h"

#include "codepseudo.h"

#include "codevars.h"

#include "tipseudo.h"

#include "tifloat.h"

#include "headids.h"

#include "onoff_common.h"

#include "errmsg.h"

#include "code3203x.h"

typedef struct

{

  LongWord Code;

} FixedOrder;

typedef struct

{

  int NameLen;

  CPUVar MinCPU;

  Boolean May1, May3;

  Word Code, Code3;

  Boolean OnlyMem;

  Boolean SwapOps;

  Boolean ImmFloat;

  Boolean Commutative;

  ShortInt ParMask, Par3Mask;

  unsigned ParIndex, ParIndex3;

  Byte PCodes[8], P3Codes[8];

} GenOrder;

typedef struct

{

  LongWord Code;

  Byte Mask;

} SingOrder;

typedef struct

{

  const GenOrder *pOrder;

  Boolean Is3;

  ShortInt Src2Mode, Src1Mode, DestMode;

  Word Src2Part, Src1Part, DestPart;

} tGenOrderInfo;

static CPUVar CPU32030, CPU32031,

              CPU32040, CPU32044;

static Boolean NextPar, ThisPar;

static Byte PrevARs, ARs;

static char PrevOp[7];

static tGenOrderInfo PrevGenInfo;

static FixedOrder *FixedOrders;

static GenOrder *GenOrders;

static SingOrder *SingOrders;

static LongInt DPValue;

static const char ParOrders[][6] =

{

  "LDF",   "LDI",

  "STF",   "STI",

  "ADDF3", "SUBF3",

  "ADDI3", "SUBI3"

};

/*-------------------------------------------------------------------------*/

/* Adressparser */

/* do not change this enum, since it is defined the way as needed in the machine

   code G field! */

#define ModNone (-1)

#define ModReg 0

#define MModReg (1 << ModReg)

#define ModDir 1

#define MModDir (1 << ModDir)

#define ModInd 2

#define MModInd (1 << ModInd)

#define ModImm 3

#define MModImm (1 << ModImm)

static ShortInt AdrMode;

static LongInt AdrPart;

/* special registers with address 0x10... vary: */

#define ARxRegStart 0x08

#define CxxRegStart 0x10

static const char *C4XRegs[] =

{ "DP", "IR0", "IR1", "BK", "SP", "ST", "DIE", "IIE", "IIF", "RS", "RE", "RC", NULL },

                  *C3XRegs[] =

{ "DP", "IR0", "IR1", "BK", "SP", "ST", "IE" , "IF" , "IOF", "RS", "RE", "RC", NULL },

                  **CxxRegs;

static const char *ExpRegs[] =

{ "IVTP", "TVTP", NULL };

static Boolean Is4x(void)

{

  return MomCPU >= CPU32040;

}

static Boolean DecodeReg(const char *Asc, Byte *Erg)

{

  if ((as_toupper(*Asc) == 'R') && (strlen(Asc) <= 3) && (strlen(Asc) >= 2))

  {

    Boolean OK;

    *Erg = ConstLongInt(Asc + 1, &OK, 10);

    /* For C3x, tolerate R8...R27 as aliases for other registers for backward compatibility.

       For C4x, four new registers R8...R11 are mapped at register file address 28..31.

       So for C4x, only allow the defined R0..11 registers: */

    if (OK)

      OK = *Erg <= Is4x() ? 11 : 27;

    if (OK)

    {

      if (Is4x() && (*Erg >= 8))

        *Erg += 20;

      return True;

    }

  }

  if ((strlen(Asc) == 3)

   && (as_toupper(*Asc) == 'A') && (as_toupper(Asc[1]) == 'R')

   && (Asc[2] >= '0') && (Asc[2] <= '7'))

  {

    *Erg = Asc[2] - '0' + ARxRegStart;

    return True;

  }

  for (*Erg = 0; CxxRegs[*Erg]; (*Erg)++)

    if (!as_strcasecmp(CxxRegs[*Erg], Asc))

    {

      *Erg += CxxRegStart;

      return True;

    }

  return False;

}

static Boolean DecodeExpReg(const char *Asc, Byte *Erg)

{

  for (*Erg = 0; ExpRegs[*Erg]; (*Erg)++)

    if (!as_strcasecmp(ExpRegs[*Erg], Asc))

      return True;

  return False;

}

static void DecodeAdr(const tStrComp *pArg, Byte Erl, Boolean ImmFloat)

{

  Byte HReg;

  Integer Disp;

  char *p;

  int l;

  as_float_t f;

  Word fi;

  LongInt AdrLong;

  Boolean BitRev, Circ;

  Boolean OK;

  enum

  {

    ModBase, ModAdd, ModSub, ModPreInc, ModPreDec, ModPostInc, ModPostDec

  } Mode;

  tStrComp Arg;

  StrCompRefRight(&Arg, pArg, 0);

  KillPrefBlanksStrCompRef(&Arg);

  KillPostBlanksStrComp(&Arg);

  AdrMode = ModNone;

  /* I. Register? */

  if (DecodeReg(Arg.str.p_str, &HReg))

  {

    AdrMode = ModReg; AdrPart = HReg;

    goto chk;

  }

  /* II. indirekt ? */

  if (*Arg.str.p_str == '*')

  {

    /* II.1. Erkennungszeichen entfernen */

    StrCompIncRefLeft(&Arg, 1);;

    /* II.2. Extrawuerste erledigen */

    BitRev = False;

    Circ = False;

    l = strlen(Arg.str.p_str);

    if ((l > 0) && (as_toupper(Arg.str.p_str[l - 1]) == 'B'))

    {

      BitRev = True;

      StrCompShorten(&Arg, 1);

      --l;

    }

    else if ((l > 0) && (Arg.str.p_str[l - 1] == '%'))

    {

      Circ = True;

      StrCompShorten(&Arg, 1);

      --l;

    }

    /* II.3. Displacement entfernen und auswerten:

            0..255-->Displacement

            -1,-2 -->IR0,IR1

            -3    -->Default */

    p = QuotPos(Arg.str.p_str, '(');

    if (p)

    {

      tStrComp NDisp;

      if (Arg.str.p_str[l - 1] != ')')

      {

        WrError(ErrNum_InvAddrMode);

        return;

      }

      StrCompSplitRef(&Arg, &NDisp, &Arg, p);

      StrCompShorten(&NDisp, 1);

      if (!as_strcasecmp(NDisp.str.p_str, "IR0"))

        Disp = -1;

      else if (!as_strcasecmp(NDisp.str.p_str, "IR1"))

        Disp = -2;

      else

      {

        Disp = EvalStrIntExpression(&NDisp, UInt8, &OK);

        if (!OK)

          return;

      }

    }

    else

      Disp = -3;

    /* II.4. Addieren/Subtrahieren mit/ohne Update? */

    l = strlen(Arg.str.p_str);

    if (*Arg.str.p_str == '-')

    {

      if (Arg.str.p_str[1] == '-')

      {

        Mode = ModPreDec;

        StrCompIncRefLeft(&Arg, 2);

      }

      else

      {

        Mode = ModSub;

        StrCompIncRefLeft(&Arg, 1);

      }

    }

    else if (*Arg.str.p_str == '+')

    {

      if (Arg.str.p_str[1] == '+')

      {

        Mode = ModPreInc;

        StrCompIncRefLeft(&Arg, 2);

      }

      else

      {

        Mode = ModAdd;

        StrCompIncRefLeft(&Arg, 1);

      }

    }

    else if (Arg.str.p_str[l - 1] == '-')

    {

      if (Arg.str.p_str[l - 2] == '-')

      {

        Mode = ModPostDec;

        StrCompShorten(&Arg, 2);

      }

      else

      {

        WrError(ErrNum_InvAddrMode);

        return;

      }

    }

    else if (Arg.str.p_str[l - 1] == '+')

    {

      if (Arg.str.p_str[l - 2] == '+')

      {

        Mode = ModPostInc;

        StrCompShorten(&Arg, 2);

      }

      else

      {

        WrError(ErrNum_InvAddrMode);

        return;

      }

    }

    else

      Mode = ModBase;

    /* II.5. Rest muss Basisregister sein */

    if ((!DecodeReg(Arg.str.p_str, &HReg)) || (HReg < 8) || (HReg > 15))

    {

      WrError(ErrNum_InvAddrMode);

      return;

    }

    HReg -= 8;

    if ((ARs & (1l << HReg)) == 0)

      ARs += 1l << HReg;

    else

      WrStrErrorPos(ErrNum_DoubleAdrRegUse, &Arg);

    /* II.6. Default-Displacement explizit machen */

    if (Disp == -3)

     Disp = (Mode == ModBase) ? 0 : 1;

    /* II.7. Entscheidungsbaum */

    switch (Mode)

    {

      case ModBase:

      case ModAdd:

        if ((Circ) || (BitRev)) WrError(ErrNum_InvAddrMode);

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0x8000; break;

            case -1: AdrPart = 0x4000; break;

            case  0: AdrPart = 0xc000; break;

            default: AdrPart = Disp;

          }

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

      case ModSub:

        if ((Circ) || (BitRev)) WrError(ErrNum_InvAddrMode);

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0x8800; break;

            case -1: AdrPart = 0x4800; break;

            case  0: AdrPart = 0xc000; break;

            default: AdrPart = 0x0800 + Disp;

          }

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

      case ModPreInc:

        if ((Circ) || (BitRev)) WrError(ErrNum_InvAddrMode);

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0x9000; break;

            case -1: AdrPart = 0x5000; break;

            default: AdrPart = 0x1000 + Disp;

          }

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

      case ModPreDec:

        if ((Circ) || (BitRev)) WrError(ErrNum_InvAddrMode);

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0x9800; break;

            case -1: AdrPart = 0x5800; break;

            default: AdrPart = 0x1800 + Disp;

          }

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

      case ModPostInc:

        if (BitRev)

        {

          if (Disp != -1) WrError(ErrNum_InvAddrMode);

          else

          {

            AdrPart = 0xc800 + (((Word)HReg) << 8);

            AdrMode = ModInd;

          }

        }

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0xa000; break;

            case -1: AdrPart = 0x6000; break;

            default: AdrPart = 0x2000 + Disp;

          }

          if (Circ)

            AdrPart += 0x1000;

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

      case ModPostDec:

        if (BitRev) WrError(ErrNum_InvAddrMode);

        else

        {

          switch (Disp)

          {

            case -2: AdrPart = 0xa800; break;

            case -1: AdrPart = 0x6800; break;

            default: AdrPart = 0x2800 + Disp; break;

          }

          if (Circ)

             AdrPart += 0x1000;

          AdrPart += ((Word)HReg) << 8;

          AdrMode = ModInd;

        }

        break;

    }

    goto chk;

  }

  /* III. absolut */

  if (*Arg.str.p_str == '@')

  {

    AdrLong = EvalStrIntExpressionOffs(&Arg, 1, UInt24, &OK);

    if (OK)

    {

      if ((DPValue != -1) && ((AdrLong >> 16) != DPValue))

        WrError(ErrNum_InAccPage);

      AdrMode = ModDir;

      AdrPart = AdrLong & 0xffff;

    }

    goto chk;

  }

  /* IV. immediate */

  if (ImmFloat)

  {

    f = EvalStrFloatExpression(&Arg, &OK);

    if (OK)

    {

      int ret = as_float_2_ti2(f, &fi);

      if (ret < 0)

      {

        asmerr_check_fp_dispose_result(ret, pArg);

        OK = False;

      }

    }

    if (OK)

    {

      AdrPart = fi;

      AdrMode = ModImm;

    }

  }

  else

  {

    AdrPart = EvalStrIntExpression(&Arg, Int16, &OK);

    if (OK)

    {

      AdrPart &= 0xffff;

      AdrMode = ModImm;

    }

  }

chk:

  if ((AdrMode != ModNone) && (!(Erl & (1 << AdrMode))))

  {

    AdrMode = ModNone;

    WrError(ErrNum_InvAddrMode);

  }

}

static Word EffPart(Byte Mode, Word Part)

{

  switch (Mode)

  {

    case ModReg:

    case ModImm:

      return Lo(Part);

    case ModInd:

      return Hi(Part);

    default:

      WrError(ErrNum_InternalError);

      return 0;

  }

}

/*-------------------------------------------------------------------------*/

/* Code-Erzeugung */

static void JudgePar(const GenOrder *Prim, int Sec, Byte *ErgMode, Byte *ErgCode)

{

  if (Sec > 3)

    *ErgMode = 3;

  else if (Prim->May3)

    *ErgMode = 1;

  else

    *ErgMode = 2;

  *ErgCode = (*ErgMode == 2) ? Prim->PCodes[Sec] : Prim->P3Codes[Sec];

}

static LongWord EvalAdrExpression(const tStrComp *pArg, Boolean *OK, tSymbolFlags *pFlags)

{

  return EvalStrIntExpressionOffsWithFlags(pArg, !!(*pArg->str.p_str == '@'), UInt24, OK, pFlags);

}

static void SwapMode(ShortInt *M1, ShortInt *M2)

{

  AdrMode = (*M1);

  *M1 = (*M2);

  *M2 = AdrMode;

}

static void SwapPart(Word *P1, Word *P2)

{

  AdrPart = (*P1);

  *P1 = (*P2);

  *P2 = AdrPart;

}

static int MatchParIndex(Byte Mask, int Index)

{

  return ((Index >= 0) && (Mask & (1 << Index))) ? Index : -1;

}

/*-------------------------------------------------------------------------*/

/* Instruction Decoders */

 /* ohne Argument */

static void DecodeFixed(Word Index)

{

  if (!ChkArgCnt(0, 0));

  else if (ThisPar) WrError(ErrNum_ParNotPossible);

  else

  {

    DAsmCode[0] = FixedOrders[Index].Code;

    CodeLen = 1;

  }

  NextPar = False;

}

/* Arithmetik/Logik */

static Boolean Gen3IndirectAllowed(LongWord ThisAdrPart)

{

  /* indirect addressing mode fits into 3-op, non-par instruction if it needs no

     displacement, i.e. the 'displacement' is IR0/IR1/special, or it is one: */

  return ((ThisAdrPart & 0xc000) || (Lo(ThisAdrPart) == 1));

}

static Boolean Is4xArDisp(ShortInt ThisAdrMode, LongWord ThisAdrPart)

{

  return (ThisAdrMode == ModInd)

      && ((ThisAdrPart & 0xf800) == 0x0000)

      && (Lo(ThisAdrPart) != 1)  /* prefer C3x format if displacement=1 */

      && (Lo(ThisAdrPart) <= 31);

}

static void DecodeGen(Word Index)

{

  Byte HReg, HReg2, Sum;

  String Form;

  tGenOrderInfo CurrGenInfo;

  LongWord T21_22 = 0, T28 = 0;

  const tStrComp *pArg[4];

  int ActArgCnt;

  NextPar = False;

  CurrGenInfo.pOrder = GenOrders + (Index & ~0x8000);

  CurrGenInfo.Is3 = (Index & 0x8000) || FALSE;

  if (!ChkMinCPU(CurrGenInfo.pOrder->MinCPU))

    return;

  for (ActArgCnt = 0; ActArgCnt <= ArgCnt; ActArgCnt++)

    pArg[ActArgCnt] = &ArgStr[ActArgCnt];

  ActArgCnt = ArgCnt;

  /* Argumentzahl abgleichen */

  if (ActArgCnt == 1)

  {

    if (CurrGenInfo.pOrder->May1)

    {

      ActArgCnt = 2;

      pArg[2] = pArg[1];

    }

    else

    {

      (void)ChkArgCntExt(ActArgCnt, 2, 2);

      return;

    }

  }

  if ((ActArgCnt == 3) && (!CurrGenInfo.Is3))

    CurrGenInfo.Is3 = True;

  if ((CurrGenInfo.pOrder->SwapOps) && (!CurrGenInfo.Is3))

  {

    pArg[3] = pArg[1];

    pArg[1] = pArg[2];

    pArg[2] = pArg[3];

  }

  if ((CurrGenInfo.Is3) && (ActArgCnt == 2))

  {

    ActArgCnt = 3;

    pArg[3] = pArg[2];

  }

  if ((ActArgCnt < 2) || (ActArgCnt > 3) || ((CurrGenInfo.Is3) && (!CurrGenInfo.pOrder->May3)))

  {

    (void)ChkArgCntExt(ActArgCnt, 3, 3);

    return;

  }

  /* Argumente parsen */

  if (CurrGenInfo.Is3)

  {

    if (Memo("TSTB3"))

    {

      CurrGenInfo.DestMode = ModReg;

      CurrGenInfo.DestPart = 0;

    }

    else

    {

      DecodeAdr(pArg[3], MModReg, CurrGenInfo.pOrder->ImmFloat);

      if (AdrMode == ModNone)

        return;

      CurrGenInfo.DestMode = AdrMode;

      CurrGenInfo.DestPart = AdrPart;

    }

    /* The C4x type 2 format may use an immediate operand only if it is an

       integer operation - there is no 8-bit represenataion of floats. */

    DecodeAdr(pArg[1],

              MModReg | MModInd | ((Is4x() && !CurrGenInfo.pOrder->ImmFloat) ? MModImm : 0),

              CurrGenInfo.pOrder->ImmFloat);

    if (AdrMode == ModNone)

      return;

    /* src2 is immediate or *+ARn(udisp5): C4x type 2 format */

    if (AdrMode == ModImm)

    {

      T28 = 1ul << 28;

    }

    else if (Is4x() && Is4xArDisp(AdrMode, AdrPart))

    {

      /* note that for type 2, bit 21 defines addressing mode of src2 and bit 22

         defines addressing mode of src1, which is the opposite of the type 1 format! */

      T21_22 |= 1ul << 21;

      T28 = 1ul << 28;

      AdrPart = ((Word)(Hi(AdrPart) & 7) | (Lo(AdrPart) << 3)) << 8;

    }

    /* type 1/C3x format: check whether indirect mode is 'short': */

    else if (AdrMode == ModInd)

    {

      if (!Gen3IndirectAllowed(AdrPart))

      {

        WrError(ErrNum_InvAddrMode);

        return;

      }

      T21_22 |= 1ul << 22;

    }

    CurrGenInfo.Src2Mode = AdrMode;

    CurrGenInfo.Src2Part = AdrPart;

    DecodeAdr(pArg[2], MModReg | MModInd, CurrGenInfo.pOrder->ImmFloat);

    if (AdrMode == ModNone)

      return;

    /* if type 2, the only indirect mode allowed for src1 is *+ARn(udisp5): */

    if (T28)

    {

      if (AdrMode == ModInd)

      {

        if (!Is4xArDisp(AdrMode, AdrPart))

        {

          WrError(ErrNum_InvAddrMode);

          return;

        }

        else

          AdrPart = ((Word)(Hi(AdrPart) & 7) | (Lo(AdrPart) << 3)) << 8;

        T21_22 |= 1ul << 22;

      }

    }

    /* type 1/C3x format: similar check for src1 for 'short' adressing: */

    else if (AdrMode == ModInd)

    {

      if (!Gen3IndirectAllowed(AdrPart))

      {

        WrError(ErrNum_InvAddrMode);

        return;

      }

      T21_22 |= 1ul << 21;

    }

    CurrGenInfo.Src1Mode = AdrMode;

    CurrGenInfo.Src1Part = AdrPart;

  }

  else /* !CurrGenInfo.Is3 */

  {

    DecodeAdr(pArg[1], MModDir + MModInd + ((CurrGenInfo.pOrder->OnlyMem) ? 0 : MModReg + MModImm), CurrGenInfo.pOrder->ImmFloat);

    if (AdrMode == ModNone)

      return;

    CurrGenInfo.Src2Mode = AdrMode;

    CurrGenInfo.Src2Part = AdrPart;

    DecodeAdr(pArg[2], MModReg + MModInd, CurrGenInfo.pOrder->ImmFloat);

    switch (AdrMode)

    {

      case ModReg:

        CurrGenInfo.DestMode = AdrMode;

        CurrGenInfo.DestPart = AdrPart;

        CurrGenInfo.Src1Mode = CurrGenInfo.Src2Mode;

        CurrGenInfo.Src1Part = CurrGenInfo.Src2Part;

        break;

      case ModInd:

        if (((strcmp(OpPart.str.p_str, "TSTB")) && (strcmp(OpPart.str.p_str, "CMPI")) && (strcmp(OpPart.str.p_str, "CMPF")))

        ||  ((CurrGenInfo.Src2Mode == ModDir) || (CurrGenInfo.Src2Mode == ModImm))

        ||  ((CurrGenInfo.Src2Mode == ModInd) && ((CurrGenInfo.Src2Part & 0xe000) == 0) && (Lo(CurrGenInfo.Src2Part) != 1))

        ||  (((AdrPart & 0xe000) == 0) && (Lo(AdrPart) != 1)))

        {

          WrError(ErrNum_InvAddrMode);

          return;

        }

        else

        {

          CurrGenInfo.Is3 = True;

          CurrGenInfo.DestMode = ModReg;

          CurrGenInfo.DestPart = 0;

          CurrGenInfo.Src1Mode = AdrMode;

          CurrGenInfo.Src1Part = AdrPart;

        }

        break;

      case ModNone: