WebSVN – pentevo – Blame – //tools/asl/asl-current/include/avr/regm328.inc

Rev	Author	Line No.	Line
1186	savelij	1	ifndef __regm328inc
		2	__regm328inc equ 1
		3	save
		4	listing off ; no listing over this file
		5
		6	;****************************************************************************
		7	;* *
		8	;* AS 1.42 - File REGM328.INC *
		9	;* *
		10	;* Contains Bit & Register Definitions for ATmega328 *
		11	;* *
		12	;****************************************************************************
		13
		14	;----------------------------------------------------------------------------
		15	; Memory Limits
		16
		17	E2END equ 1023
		18	RAMSTART equ 0x100,data
		19	RAMEND equ 0x8ff,data
		20	FLASHEND label 0x7fff
		21
		22	;----------------------------------------------------------------------------
		23	; Chip Control
		24
		25	MCUCR port 0x35 ; MCU Control Register
		26	IVCE avrbit MCUCR,0 ; Interrupt Vector Change Enable
		27	IVSEL avrbit MCUCR,1 ; Interrupt Vector Select
		28	BODSE avrbit MCUCR,5 ; BOD Sleep Enable
		29	BODS avrbit MCUCR,6 ; BOD Sleep
		30
		31	MCUSR port 0x34 ; MCU Status Register
		32	PORF avrbit MCUSR,0 ; Power-on Reset Occured
		33	EXTRF avrbit MCUSR,1 ; External Reset Occured
		34	BORF avrbit MCUSR,2 ; Brown Out Reset Occured
		35	WDRF avrbit MCUSR,3 ; Watchdog Reset Occured
		36
		37	SMCR port 0x33 ; Sleep Mode Control Register
		38	SE avrbit SMCR,0 ; Sleep Mode Enable
		39	SM0 avrbit SMCR,1 ; Sleep Mode Select
		40	SM1 avrbit SMCR,2
		41	SM2 avrbit SMCR,3
		42
		43	PRR sfr 0x64 ; Power Reduction Register
		44	PRADC avrbit PRR,0 ; Power Reduction ADC
		45	PRUSART0 avrbit PRR,1 ; Power Reduction USART0
		46	PRSPI0 avrbit PRR,2 ; Power Reduction Serial Peripheral Interface 0
		47	PRTIM1 avrbit PRR,3 ; Power Reduction Timer/Counter 1
		48	PRTIM0 avrbit PRR,5 ; Power Reduction Timer/Counter 0
		49	PRTIM2 avrbit PRR,6 ; Power Reduction Timer/Counter 2
		50	PRTWI0 avrbit PRR,7 ; Power Reduction Two Wire Interface 0
		51
		52	OSCCAL sfr 0x66 ; Oscillator Calibration
		53
		54	CLKPR sfr 0x61 ; Clock Prescale Register
		55	CLKPS0 avrbit CLKPR,0 ; Clock Prescaler Relect
		56	CLKPS1 avrbit CLKPR,1
		57	CLKPS2 avrbit CLKPR,2
		58	CLKPS3 avrbit CLKPR,3
		59	CLKPCE avrbit CLKPR,7 ; Clock Prescaler Change Enable
		60
		61	DWDR port 0x31 ; debugWire Data Register
		62
		63	;----------------------------------------------------------------------------
		64	; EEPROM/Program Memory Access
		65
		66	include "eem2.inc"
		67	include "spmcsr37.inc"
		68
		69	EEPM0 avrbit EECR,4 ; EEPROM Programming Mode
		70	EEPM1 avrbit EECR,5
		71
		72	; additional bits in SPMCSR
		73	SIGRD avrbit SPMCSR,5 ; signature row read
		74
		75	;----------------------------------------------------------------------------
		76	; GPIO
		77
		78	PUD avrbit MCUCR,4 ; pull up Disable
		79
		80	PINB port 0x03 ; Port B @ 0x03 (IO) ff.
		81	PINC port 0x06 ; Port C @ 0x06 (IO) ff.
		82	PIND port 0x09 ; Port D @ 0x09 (IO) ff.
		83
		84	PCMSK0 sfr 0x6b ; Pin Change Mask Register 0
		85	PCMSK1 sfr 0x6c ; Pin Change Mask Register 1 (8..14)
		86	PCMSK2 sfr 0x6d ; Pin Change Mask Register 2
		87	PCICR sfr 0x68 ; Pin Change Interrupt Control Register
		88	PCIFR port 0x1b ; Pin Change Interrupt Flag Register
		89
		90	GPIOR0 port 0x1e ; general purpose Registers
		91	GPIOR1 port 0x2a
		92	GPIOR2 port 0x2b
		93
		94	;----------------------------------------------------------------------------
		95	; Interrupt Vectors
		96
		97	enumconf 2,code
		98	enum INT0_vect=2 ; External Interrupt Request 0
		99	nextenum INT1_vect ; External Interrupt Request 1
		100	nextenum PCINT0_vect ; pin change Interrupt Request 0
		101	nextenum PCINT1_vect ; pin change Interrupt Request 1
		102	nextenum PCINT2_vect ; pin change Interrupt Request 2
		103	nextenum WDT_vect ; watchdog time-out Interrupt
		104	nextenum TIMER2_COMPA_vect ; Timer/Counter 2 Compare Match A
		105	nextenum TIMER2_COMPB_vect ; Timer/Counter 2 Compare Match B
		106	nextenum TIMER2_OVF_vect ; Timer/Counter 2 Overflow
		107	nextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capture
		108	nextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match A
		109	nextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match B
		110	nextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflow
		111	nextenum TIMER0_COMPA_vect ; Timer/Counter 0 Compare Match A
		112	nextenum TIMER0_COMPB_vect ; Timer/Counter 0 Compare Match B
		113	nextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflow
		114	nextenum SPI_STC_vect ; SPI Serial Transfer Complete
		115	nextenum USART_RX_vect ; USART Rx Complete
		116	nextenum USART_UDRE_vect ; USART Data Register Empty
		117	nextenum USART_TX_vect ; USART Tx Complete
		118	nextenum ADC_vect ; ADC conversion Complete
		119	nextenum EE_READY_vect ; EEPROM Ready
		120	nextenum ANALOG_COMP_vect ; Analog Comparator
		121	nextenum TWI_vect ; two-wire Serial interface
		122	nextenum SPM_READY_vect ; store program memory Ready
		123
		124	;----------------------------------------------------------------------------
		125	; External Interrupts
		126
		127	EICRA sfr 0x69 ; External Interrupt Control Register A
		128	ISC00 avrbit EICRA,0 ; External Interrupt 0 Sense Control
		129	ISC01 avrbit EICRA,1
		130	ISC10 avrbit EICRA,2 ; External Interrupt 1 Sense Control
		131	ISC11 avrbit EICRA,3
		132
		133	EIMSK port 0x1d ; External Interrupt Mask Register
		134	INT0 avrbit EIMSK,0 ; Enable External Interrupt 0
		135	INT1 avrbit EIMSK,1 ; Enable External Interrupt 1
		136
		137	EIFR port 0x1c ; External Interrupt Flag Register
		138	INTF0 avrbit EIFR,0 ; External Interrupt 0 Occured
		139	INTF1 avrbit EIFR,1 ; External Interrupt 1 Occured
		140
		141	;----------------------------------------------------------------------------
		142	; Timers
		143
		144	GTCCR port 0x23 ; General Timer/Counter Control Register
		145	PSRSYNC avrbit GTCCR,0 ; Prescaler Reset
		146	PSRASY avrbit GTCCR,1 ; Prescaler Reset Timer/Counter2
		147	TSM avrbit GTCCR,7 ; Timer/Counter Synchronization Mode
		148
		149	TCCR0A port 0x24 ; Timer/Counter 0 Control Register A
		150	WGM00 avrbit TCCR0A,0 ; Timer/Counter 0 Waveform Generation Mode
		151	WGM01 avrbit TCCR0A,1
		152	COM0B0 avrbit TCCR0A,4 ; Timer/Counter 0 Compare B Mode
		153	COM0B1 avrbit TCCR0A,5
		154	COM0A0 avrbit TCCR0A,6 ; Timer/Counter 0 Compare A Mode
		155	COM0A1 avrbit TCCR0A,7
		156	TCCR0B port 0x25 ; Timer/Counter 0 Control Register B
		157	CS00 avrbit TCCR0B,0 ; Timer/Counter 0 Clock Select
		158	CS01 avrbit TCCR0B,1
		159	CS02 avrbit TCCR0B,2
		160	WGM02 avrbit TCCR0B,3 ; Timer/Counter 0 Waveform Generation Mode
		161	FOC0B avrbit TCCR0B,6 ; Timer/Counter 0 Force Output Compare B
		162	FOC0A avrbit TCCR0B,7 ; Timer/Counter 0 Force Output Compare A
		163	TCNT0 port 0x26 ; Timer/Counter 0
		164	OCR0A port 0x27 ; Timer/Counter 0 Output Compare Value A
		165	OCR0B port 0x28 ; Timer/Counter 0 Output Compare Value B
		166
		167	TCCR1A sfr 0x80 ; Timer/Counter 1 Control Register A
		168	WGM10 avrbit TCCR1A,0 ; Timer/Counter 1 Waveform Generation Mode
		169	WGM11 avrbit TCCR1A,1
		170	COM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode B
		171	COM1B1 avrbit TCCR1A,5
		172	COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode A
		173	COM1A1 avrbit TCCR1A,7
		174	TCCR1B sfr 0x81 ; Timer/Counter 1 Control Register B
		175	CS10 avrbit TCCR1B,0 ; Timer/Counter 1 Prescaler Setting
		176	CS11 avrbit TCCR1B,1
		177	CS12 avrbit TCCR1B,2
		178	WGM12 avrbit TCCR1B,3 ; Timer/Counter 1 Waveform Generation Mode
		179	WGM13 avrbit TCCR1B,4
		180	ICES1 avrbit TCCR1B,6 ; Timer/Counter 1 Capture Slope Selection
		181	ICNC1 avrbit TCCR1B,7 ; Timer/Counter 1 Capture Noise Filter
		182	TCCR1C sfr 0x82 ; Timer/Counter 1 Control Register C
		183	FOC1B avrbit TCCR1C,6 ; Timer/Counter 1 Force Output Compare B
		184	FOC1A avrbit TCCR1C,7 ; Timer/Counter 1 Force Output Compare A
		185	TCNT1L sfr 0x84 ; Timer/Counter 1 Value LSB
		186	TCNT1H sfr 0x85 ; Timer/Counter 1 Value MSB
		187	OCR1AL sfr 0x88 ; Timer/Counter 1 Output Compare Value A LSB
		188	OCR1AH sfr 0x89 ; Timer/Counter 1 Output Compare Value A MSB
		189	OCR1BL sfr 0x8a ; Timer/Counter 1 Output Compare Value B LSB
		190	OCR1BH sfr 0x8b ; Timer/Counter 1 Output Compare Value B MSB
		191	ICR1L sfr 0x86 ; Timer/Counter 1 Input Capture Value LSB
		192	ICR1H sfr 0x87 ; Timer/Counter 1 Input Capture Value MSB
		193
		194	TCCR2A sfr 0xb0 ; Timer/Counter 2 Control Register A
		195	WGM20 avrbit TCCR2A,0 ; Timer/Counter 2 Waveform Generation Mode
		196	WGM21 avrbit TCCR2A,1
		197	COM2B0 avrbit TCCR2A,4 ; Timer/Counter 2 Compare Mode B
		198	COM2B1 avrbit TCCR2A,5
		199	COM2A0 avrbit TCCR2A,6 ; Timer/Counter 2 Compare Mode B
		200	COM2A1 avrbit TCCR2A,7
		201	TCCR2B sfr 0xb1 ; Timer/Counter 2 Control Register B
		202	CS20 avrbit TCCR2B,0
		203	CS21 avrbit TCCR2B,1
		204	CS22 avrbit TCCR2B,2 ; Timer/Counter 2 Prescaler Setting
		205	WGM22 avrbit TCCR2B,3
		206	FOC2B avrbit TCCR2B,6 ; Timer/Counter 2 Force Output Compare B
		207	FOC2A avrbit TCCR2B,7 ; Timer/Counter 2 Force Output Compare A
		208	TCNT2 sfr 0xb2 ; Timer/Counter 2 Value
		209	OCR2A sfr 0xb3 ; Timer/Counter 2 Output Compare Value A
		210	OCR2B sfr 0xb4 ; Timer/Counter 2 Output Compare Value B
		211
		212	TIMSK0 sfr 0x6e ; Timer/Counter 0 Interrupt Mask Register
		213	TOIE0 avrbit TIMSK0,0 ; Timer/Counter 0 Overflow Interrupt Enable
		214	OCIE0A avrbit TIMSK0,1 ; Timer/Counter 0 Output Compare Interrupt Enable A
		215	OCIE0B avrbit TIMSK0,2 ; Timer/Counter 0 Output Compare Interrupt Enable B
		216	TIMSK1 sfr 0x6f ; Timer/Counter 1 Interrupt Mask Register
		217	TOIE1 avrbit TIMSK1,0 ; Timer/Counter 1 Overflow Interrupt Enable
		218	OCIE1A avrbit TIMSK1,1 ; Timer/Counter 1 Output Compare Interrupt Enable A
		219	OCIE1B avrbit TIMSK1,2 ; Timer/Counter 1 Output Compare Interrupt Enable B
		220	ICIE1 avrbit TIMSK1,5 ; Timer/Counter 1 Input Capture Event
		221	TIMSK2 sfr 0x70 ; Timer/Counter 2 Interrupt Mask Register
		222	TOIE2 avrbit TIMSK2,0 ; Timer/Counter 2 Overflow Interrupt Enable
		223	OCIE2A avrbit TIMSK2,1 ; Timer/Counter 2 Output Compare Interrupt Enable A
		224	OCIE2B avrbit TIMSK2,2 ; Timer/Counter 2 Output Compare Interrupt Enable B
		225
		226	TIFR0 port 0x15 ; Timer/Counter 0 Interrupt Status Register
		227	TIFR1 port 0x16 ; Timer/Counter 1 Interrupt Status Register
		228	TIFR2 port 0x17 ; Timer/Counter 2 Interrupt Status Register
		229
		230	ASSR sfr 0xb6 ; Asynchronous Status Register
		231	TCR2BUB avrbit ASSR,0 ; Timer/Counter Control Register 2 B Update Busy
		232	TCR2AUB avrbit ASSR,1 ; Timer/Counter Control Register 2 A Update Busy
		233	OCR2BUB avrbit ASSR,2 ; Output Compare Register 2 B Update Busy
		234	OCR2AUB avrbit ASSR,3 ; Output Compare Register 2 A Update Busy
		235	TCN2UB avrbit ASSR,4 ; Timer/Counter 2 Update Busy
		236	AS2 avrbit ASSR,5 ; Asynchronous Timer/Counter 2
		237	EXCLK avrbit ASSR,6 ; Enable External Clock Input
		238
		239	;----------------------------------------------------------------------------
		240	; Watchdog Timer
		241
		242	include "wdme.inc"
		243
		244	;----------------------------------------------------------------------------
		245	; USART
		246
		247	__USART0_SPI__ equ 1
		248	include "usartc0.inc"
		249
		250	;----------------------------------------------------------------------------
		251	; SPI
		252
		253	include "spim02c.inc"
		254
		255	;----------------------------------------------------------------------------
		256	; TWI
		257
		258	include "twimb8.inc"
		259
		260	;----------------------------------------------------------------------------
		261	; A/D Converter
		262
		263	include "adcm78.inc"
		264
		265	;----------------------------------------------------------------------------
		266	; Analog Comparator
		267
		268	include "acm30.inc"
		269
		270	restore ; re-enable listing
		271
		272	endif ; __regm328inc

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(root)//tools/asl/asl-current/include/avr/regm328.inc – Rev 1186