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Rev | Author | Line No. | Line |
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1186 | savelij | 1 | ifndef __regmxx4inc |
2 | __regmxx4inc equ 1 |
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3 | save |
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4 | listing off ; no listing over this file |
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5 | |||
6 | ;**************************************************************************** |
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7 | ;* * |
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8 | ;* AS 1.42 - File REGMXX4.INC * |
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9 | ;* * |
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10 | ;* Contains Bit & Register Definitions for ATmega164/644 * |
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11 | ;* * |
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12 | ;**************************************************************************** |
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13 | |||
14 | ;---------------------------------------------------------------------------- |
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15 | ; Chip Control |
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16 | |||
17 | MCUCR port 0x35 ; MCU Control Register |
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18 | IVCE avrbit MCUCR,0 ; Interrupt Vector Change Enable |
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19 | IVSEL avrbit MCUCR,1 ; Interrupt Vector Select |
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20 | |||
21 | MCUSR port 0x34 ; MCU Status Register |
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22 | PORF avrbit MCUSR,0 ; Power-On Reset Occured |
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23 | EXTRF avrbit MCUSR,1 ; External Reset Occured |
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24 | BORF avrbit MCUSR,2 ; brown out Reset Occured |
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25 | WDRF avrbit MCUSR,3 ; watchdog Reset Occured |
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26 | |||
27 | SMCR port 0x33 ; Sleep Mode Control Register |
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28 | SE avrbit SMCR,0 ; Sleep Mode Enable |
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29 | SM0 avrbit SMCR,1 ; Sleep Mode Select |
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30 | SM1 avrbit SMCR,2 |
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31 | SM2 avrbit SMCR,3 |
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32 | |||
33 | PRR0 sfr 0x64 ; Power Reduction Register 0 |
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34 | PRADC avrbit PRR0,0 ; Power Reduction ADC |
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35 | PRUSART0 avrbit PRR0,1 ; Power Reduction USART0 |
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36 | PRSPI0 avrbit PRR0,2 ; Power Reduction Serial Peripheral Interface 0 |
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37 | PRTIM1 avrbit PRR0,3 ; Power Reduction Timer/Counter1 |
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38 | PRUSART1 avrbit PRR0,4 ; Power Reduction USART1 |
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39 | PRTIM0 avrbit PRR0,5 ; Power Reduction Timer/Counter0 |
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40 | PRTIM2 avrbit PRR0,6 ; Power Reduction Timer/Counter2 |
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41 | PRTWI avrbit PRR0,7 ; Power Reduction TWI |
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42 | |||
43 | OSCCAL sfr 0x66 ; Oscillator Calibration |
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44 | |||
45 | CLKPR sfr 0x61 ; Clock Prescale Register |
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46 | CLKPS0 avrbit CLKPR,0 ; Clock Prescaler Select |
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47 | CLKPS1 avrbit CLKPR,1 |
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48 | CLKPS2 avrbit CLKPR,2 |
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49 | CLKPS3 avrbit CLKPR,3 |
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50 | CLKPCE avrbit CLKPR,7 ; Clock Prescaler Change Enable |
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51 | |||
52 | ;---------------------------------------------------------------------------- |
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53 | ; EEPROM/Program Memory Access |
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54 | |||
55 | include "eem2.inc" |
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56 | include "spmcsr37.inc" |
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57 | |||
58 | EEPM0 avrbit EECR,4 ; EEPROM Programming Mode |
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59 | EEPM1 avrbit EECR,5 |
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60 | |||
61 | SIGRD avrbit SPMCSR,5 ; Signature Row Read |
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62 | |||
63 | ;---------------------------------------------------------------------------- |
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64 | ; JTAG |
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65 | |||
66 | JTD avrbit MCUCR,7 ; JTAG Disable |
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67 | |||
68 | JTRF avrbit MCUSR,4 ; JTAG Reset Occured |
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69 | |||
70 | OCDR port 0x31 ; On-Chip Debug Register |
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71 | |||
72 | ;---------------------------------------------------------------------------- |
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73 | ; GPIO |
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74 | |||
75 | PUD avrbit MCUCR,4 ; Pull Up Disable |
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76 | |||
77 | PINA port 0x00 ; Port A @ 0x00 (IO) ff. |
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78 | PINB port 0x03 ; Port B @ 0x03 (IO) ff. |
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79 | PINC port 0x06 ; Port C @ 0x06 (IO) ff. |
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80 | PIND port 0x09 ; Port D @ 0x09 (IO) ff. |
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81 | |||
82 | PCMSK0 sfr 0x6b ; Pin Change Mask Register 0 |
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83 | PCMSK1 sfr 0x6c ; Pin Change Mask Register 1 |
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84 | PCMSK2 sfr 0x6d ; Pin Change Mask Register 2 |
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85 | PCMSK3 sfr 0x73 ; Pin Change Mask Register 3 |
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86 | PCICR sfr 0x68 ; Pin Change Interrupt Control Register |
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87 | PCIFR port 0x1b ; Pin Change Interrupt Flag Register |
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88 | |||
89 | GPIOR0 port 0x1e ; General Purpose I/O Registers |
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90 | GPIOR1 port 0x2a |
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91 | GPIOR2 port 0x2b |
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92 | |||
93 | ;---------------------------------------------------------------------------- |
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94 | ; Interrupt Vectors |
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95 | |||
96 | enumconf 2,code |
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97 | enum INT0_vect=2 ; External Interrupt Request 0 |
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98 | nextenum INT1_vect ; External Interrupt Request 1 |
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99 | nextenum INT2_vect ; External Interrupt Request 2 |
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100 | nextenum PCINT0_vect ; Pin Change Interrupt Request 0 |
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101 | nextenum PCINT1_vect ; Pin Change Interrupt Request 1 |
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102 | nextenum PCINT2_vect ; Pin Change Interrupt Request 2 |
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103 | nextenum PCINT3_vect ; Pin Change Interrupt Request 3 |
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104 | nextenum WDT_vect ; Watchdog Time-Out Interrupt |
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105 | nextenum TIMER2_COMPA_vect ; Timer/Counter 2 Compare Match A |
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106 | nextenum TIMER2_COMPB_vect ; Timer/Counter 2 Compare Match B |
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107 | nextenum TIMER2_OVF_vect ; Timer/Counter 2 Overflow |
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108 | nextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capture Event |
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109 | nextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match A |
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110 | nextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match B |
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111 | nextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflow |
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112 | nextenum TIMER0_COMPA_vect ; Timer/Counter 0 Compare Match A |
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113 | nextenum TIMER0_COMPB_vect ; Timer/Counter 0 Compare Match B |
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114 | nextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflow |
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115 | nextenum SPI_STC_vect ; SPI Transfer Complete |
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116 | nextenum USART0_RX_vect ; USART0 Rx Complete |
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117 | nextenum USART0_UDRE_vect ; USART0 Data Register Empty |
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118 | nextenum USART0_TX_vect ; USART0 Tx Complete |
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119 | nextenum ANALOG_COMP_vect ; Analog Comparator |
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120 | nextenum ADC_vect ; ADC Conversion Complete |
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121 | nextenum EE_READY_vect ; EEPROM Ready |
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122 | nextenum TWI_vect ; 2-Wire Serial Interface |
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123 | nextenum SPM_READY_vect ; Store Program Memory Ready |
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124 | if MOMCPUNAME<>"ATMEGA644" ; Second USART not on 644, only 644P |
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125 | nextenum USART1_RX_vect ; USART1 Rx Complete |
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126 | nextenum USART1_UDRE_vect ; USART1 Data Register Empty |
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127 | nextenum USART1_TX_vect ; USART1 Tx Complete |
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128 | endif |
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129 | |||
130 | ;---------------------------------------------------------------------------- |
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131 | ; External Interrupts |
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132 | |||
133 | EICRA sfr 0x69 ; External Interrupt Control Register A |
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134 | ISC00 avrbit EICRA,0 ; External Interrupt 0 Sense Control |
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135 | ISC01 avrbit EICRA,1 |
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136 | ISC10 avrbit EICRA,2 ; External Interrupt 1 Sense Control |
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137 | ISC11 avrbit EICRA,3 |
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138 | ISC20 avrbit EICRA,4 ; External Interrupt 2 Sense Control |
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139 | ISC21 avrbit EICRA,5 |
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140 | |||
141 | EIMSK port 0x1d ; External Interrupt Mask Register |
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142 | INT0 avrbit EIMSK,0 ; Enable External Interrupt 0 |
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143 | INT1 avrbit EIMSK,1 ; Enable External Interrupt 1 |
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144 | INT2 avrbit EIMSK,2 ; Enable External Interrupt 2 |
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145 | |||
146 | EIFR port 0x1c ; External Interrupt Flag Register |
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147 | INTF0 avrbit EIFR,0 ; External Interrupt 0 Occured |
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148 | INTF1 avrbit EIFR,1 ; External Interrupt 1 Occured |
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149 | INTF2 avrbit EIFR,2 ; External Interrupt 2 Occured |
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150 | |||
151 | ;---------------------------------------------------------------------------- |
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152 | ; Timers |
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153 | |||
154 | GTCCR port 0x23 ; General Timer/Counter Control Register |
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155 | PSRSYNC avrbit GTCCR,0 ; Prescaler Reset |
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156 | TSM avrbit GTCCR,7 ; Timer/Counter Synchronization Mode |
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157 | |||
158 | TCCR0A port 0x24 ; Timer/Counter 0 Control Register A |
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159 | WGM00 avrbit TCCR0A,0 ; Timer/Counter 0 Waveform Generation Mode |
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160 | WGM01 avrbit TCCR0A,1 |
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161 | COM0B0 avrbit TCCR0A,4 ; Timer/Counter 0 Compare Mode B |
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162 | COM0B1 avrbit TCCR0A,5 |
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163 | COM0A0 avrbit TCCR0A,6 ; Timer/Counter 0 Compare Mode A |
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164 | COM0A1 avrbit TCCR0A,7 |
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165 | TCCR0B port 0x25 ; Timer/Counter 0 Control Register B |
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166 | CS00 avrbit TCCR0B,0 ; Timer/Counter 0 Clock Select |
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167 | CS01 avrbit TCCR0B,1 |
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168 | CS02 avrbit TCCR0B,2 |
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169 | WGM02 avrbit TCCR0B,3 |
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170 | FOC0B avrbit TCCR0B,6 ; Timer/Counter 0 Force Output Compare Match B |
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171 | FOC0A avrbit TCCR0B,7 ; Timer/Counter 0 Force Output Compare Match A |
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172 | TCNT0 port 0x26 ; Timer/Counter 0 Value |
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173 | OCR0A port 0x27 ; Timer/Counter 0 Output Compare Value A |
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174 | OCR0B port 0x28 ; Timer/Counter 0 Output Compare Value B |
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175 | |||
176 | TCCR1A sfr 0x80 ; Timer/Counter 1 Control Register A |
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177 | WGM10 avrbit TCCR1A,0 ; Timer/Counter 1 Waveform Generation Mode |
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178 | WGM11 avrbit TCCR1A,1 |
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179 | COM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode B |
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180 | COM1B1 avrbit TCCR1A,5 |
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181 | COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode A |
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182 | COM1A1 avrbit TCCR1A,7 |
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183 | TCCR1B sfr 0x81 ; Timer/Counter 1 Control Register B |
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184 | CS10 avrbit TCCR1B,0 ; Timer/Counter 1 Prescaler Setting |
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185 | CS11 avrbit TCCR1B,1 |
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186 | CS12 avrbit TCCR1B,2 |
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187 | WGM12 avrbit TCCR1B,3 |
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188 | WGM13 avrbit TCCR1B,4 |
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189 | ICES1 avrbit TCCR1B,6 ; Timer/Counter 1 Capture Slope Selection |
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190 | ICNC1 avrbit TCCR1B,7 ; Timer/Counter 1 Capture Noise Filter |
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191 | TCCR1C sfr 0x82 ; Timer/Counter 1 Control Register C |
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192 | FOC1B avrbit TCCR1C,6 ; Timer/Counter 1 Force Output Compare B |
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193 | FOC1A avrbit TCCR1C,7 ; Timer/Counter 1 Force Output Compare A |
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194 | TCNT1L sfr 0x84 ; Timer/Counter 1 Value LSB |
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195 | TCNT1H sfr 0x85 ; Timer/Counter 1 Value MSB |
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196 | OCR1AL sfr 0x88 ; Timer/Counter 1 Output Compare Value A LSB |
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197 | OCR1AH sfr 0x89 ; Timer/Counter 1 Output Compare Value A MSB |
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198 | OCR1BL sfr 0x8a ; Timer/Counter 1 Output Compare Value B LSB |
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199 | OCR1BH sfr 0x8b ; Timer/Counter 1 Output Compare Value B MSB |
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200 | ICR1L sfr 0x86 ; Timer/Counter 1 Input Capture Value LSB |
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201 | ICR1H sfr 0x87 ; Timer/Counter 1 Input Capture Value MSB |
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202 | |||
203 | TCCR2A sfr 0xb0 ; Timer/Counter 2 Control Register A |
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204 | WGM20 avrbit TCCR2A,0 ; Timer/Counter 2 Waveform Generation Mode |
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205 | WGM21 avrbit TCCR2A,1 |
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206 | COM2B0 avrbit TCCR2A,4 ; Timer/Counter 2 Compare Mode B |
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207 | COM2B1 avrbit TCCR2A,5 |
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208 | COM2A0 avrbit TCCR2A,6 ; Timer/Counter 2 Compare Mode A |
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209 | COM2A1 avrbit TCCR2A,7 |
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210 | TCCR2B sfr 0xb1 ; Timer/Counter 2 Control Register B |
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211 | CS20 avrbit TCCR2B,0 ; Timer/Counter 2 Prescaler Setting |
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212 | CS21 avrbit TCCR2B,1 |
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213 | CS22 avrbit TCCR2B,2 |
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214 | WGM22 avrbit TCCR2B,3 |
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215 | FOC2B avrbit TCCR2B,6 ; Timer/Counter 2 Force Output Compare B |
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216 | FOC2A avrbit TCCR2B,7 ; Timer/Counter 2 Force Output Compare A |
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217 | TCNT2 sfr 0xb2 ; Timer/Counter 2 Value |
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218 | OCR2A sfr 0xb3 ; Timer/Counter 2 Output Compare Value A |
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219 | OCR2B sfr 0xb4 ; Timer/Counter 2 Output Compare Value B |
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220 | |||
221 | TIMSK0 sfr 0x6e ; Timer/Counter 0 Interrupt Mask Register |
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222 | TOIE0 avrbit TIMSK0,0 ; Timer/Counter 0 Overflow Interrupt Enable |
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223 | OCIE0A avrbit TIMSK0,1 ; Timer/Counter 0 Output Compare Interrupt Enable A |
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224 | OCIE0B avrbit TIMSK0,2 ; Timer/Counter 0 Output Compare Interrupt Enable B |
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225 | TIMSK1 sfr 0x6f ; Timer/Counter 1 Interrupt Mask Register |
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226 | TOIE1 avrbit TIMSK1,0 ; Timer/Counter 1 Overflow Interrupt Enable |
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227 | OCIE1A avrbit TIMSK1,1 ; Timer/Counter 1 Output Compare Interrupt Enable A |
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228 | OCIE1B avrbit TIMSK1,2 ; Timer/Counter 1 Output Compare Interrupt Enable B |
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229 | ICIE1 avrbit TIMSK1,5 ; Timer/Counter 1 Input Capture Enable |
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230 | TIMSK2 sfr 0x70 ; Timer/Counter 2 Interrupt Mask Register |
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231 | TOIE2 avrbit TIMSK2,0 ; Timer/Counter 2 Overflow Interrupt Enable |
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232 | OCIE2A avrbit TIMSK2,1 ; Timer/Counter 2 Output Compare Interrupt Enable A |
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233 | OCIE2B avrbit TIMSK2,2 ; Timer/Counter 2 Output Compare Interrupt Enable B |
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234 | |||
235 | TIFR0 port 0x15 ; Timer/Counter 0 Interrupt Status Register |
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236 | TIFR1 port 0x16 ; Timer/Counter 1 Interrupt Status Register |
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237 | TIFR2 port 0x17 ; Timer/Counter 2 Interrupt Status Register |
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238 | |||
239 | ASSR sfr 0xb6 ; Asynchronous Status Register |
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240 | TCR2BUB avrbit ASSR,0 ; Timer/Counter Control Register 2 B Update Busy |
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241 | TCR2AUB avrbit ASSR,1 ; Timer/Counter Control Register 2 A Update Busy |
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242 | OCR2BUB avrbit ASSR,2 ; Output Compare Register 2 B Update Busy |
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243 | OCR2AUB avrbit ASSR,3 ; Output Compare Register 2 A Update Busy |
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244 | TCN2UB avrbit ASSR,4 ; Timer/Counter 2 Update Busy |
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245 | AS2 avrbit ASSR,5 ; Asynchronous Timer/Counter 2 |
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246 | EXCLK avrbit ASSR,6 ; Enable External Clock Input |
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247 | |||
248 | ;---------------------------------------------------------------------------- |
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249 | ; Watchdog Timer |
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250 | |||
251 | include "wdme.inc" |
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252 | |||
253 | ;---------------------------------------------------------------------------- |
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254 | ; USART |
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255 | |||
256 | __USART0_SPI__ equ 1 |
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257 | include "usartc0.inc" |
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258 | if MOMCPUNAME<>"ATMEGA644" |
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259 | __USART1_SPI__ equ 1 |
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260 | include "usartc8.inc" |
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261 | endif |
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262 | |||
263 | ;---------------------------------------------------------------------------- |
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264 | ; SPI |
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265 | |||
266 | include "spim02c.inc" |
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267 | |||
268 | ;---------------------------------------------------------------------------- |
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269 | ; TWI |
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270 | |||
271 | include "twimb8.inc" |
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272 | |||
273 | ;---------------------------------------------------------------------------- |
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274 | ; A/D Converter |
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275 | |||
276 | include "adcm78.inc" |
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277 | |||
278 | MUX4 avrbit ADMUX,4 |
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279 | |||
280 | ;---------------------------------------------------------------------------- |
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281 | ; Analog Comparator |
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282 | |||
283 | include "acm30.inc" |
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284 | |||
285 | restore ; re-enable listing |
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286 | |||
287 | endif ; __regmxx4inc |