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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | ifndef __52xxfbusinc ; avoid multiple inclusion |
| 2 | __52xxfbusinc equ 1 |
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| 3 | |||
| 4 | save |
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| 5 | listing off ; no listing over this file |
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| 6 | |||
| 7 | ;**************************************************************************** |
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| 8 | ;* * |
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| 9 | ;* AS 1.42 - File 52XXFBUS.INC * |
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| 10 | ;* * |
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| 11 | ;* Contains SFR and Bit Definitions for ColdFire MCF52xx FlexBus * |
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| 12 | ;* * |
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| 13 | ;**************************************************************************** |
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| 14 | |||
| 15 | __N set 0 |
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| 16 | rept 6 |
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| 17 | __decstr __NS,__N |
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| 18 | CSAR{__NS} equ MBAR_FBUS+(__N*12)+0 ; Chip-Select Address Register (32b) |
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| 19 | BA cffield CSAR{__NS},16,16 ; Base Address |
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| 20 | CSMR{__NS} equ MBAR_FBUS+(__N*12)+4 ; Chip-Select Mask Register (32b) |
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| 21 | BAM cffield CSMR{__NS},16,16 ; Base Address Mask |
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| 22 | WP cfbit CSMR{__NS},8 ; Write Protect |
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| 23 | V cfbit CSMR{__NS},0 ; Valid |
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| 24 | CSCR{__NS} equ MBAR_FBUS+(__N*12)+8 ; Chip-Select Control Register (32b) |
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| 25 | SWS cffield CSCR{__NS},26,6 ; Secondary Wait States |
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| 26 | SWSEN cfbit CSCR{__NS},23 ; Secondary Wait State Enable |
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| 27 | ASET cffield CSCR{__NS},20,2 ; Address Setup |
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| 28 | RDAH cffield CSCR{__NS},18,2 ; Read Address Hold Or Deselect |
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| 29 | WRAH cffield CSCR{__NS},16,2 ; Write Address Hold Or Deselect |
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| 30 | WS cffield CSCR{__NS},10,6 ; Wait States |
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| 31 | SBM cfbit CSCR{__NS},9 ; Split Bus Mode (not on MCF54xx) |
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| 32 | AA cfbit CSCR{__NS},8 ; Auto-Acknowledge Enable |
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| 33 | PS cffield CSCR{__NS},6,2 ; Port Size |
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| 34 | BEM cfbit CSCR{__NS},5 ; Byte-Enable Mode |
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| 35 | BSTR cfbit CSCR{__NS},4 ; Burst-Read Enable |
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| 36 | BSTW cfbit CSCR{__NS},3 ; Burst-Write Enable |
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| 37 | __N set __N+1 |
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| 38 | endm |
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| 39 | |||
| 40 | restore ; re-enable listing |
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| 41 | |||
| 42 | endif ; __52xxfbusinc |