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1186 savelij 1 
		ifndef	__timer1inc	; avoid multiple inclusion
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__timer1inc	equ	1
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		save
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		listing	off		; no listing over this file
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;****************************************************************************
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;*                                                                          *
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;*   AS 1.42 - File TIMER1.INC                                              *
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;*                                                                          *
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;*   contains common SFR and Bit Definitions for ST62xx Timer1              *
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;*                                                                          *
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;****************************************************************************
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__deftimer	macro	BASE,NUM
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__NS		eval	"\{NUM}"
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PSCR{__NS}	sfr	BASE+0		; Prescaler Register
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TCR{__NS}	sfr	BASE+1		; Downcounter Register
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TSCR{__NS}	sfr	BASE+2		; Status Control Register
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TMZ{__NS}	bit	7,TSCR{__NS}	;  Timer Zero Bit
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ETI{__NS}	bit	6,TSCR{__NS}	;  Enable Timer Interrupt
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PSI{__NS}	bit	3,TSCR{__NS}	;  Prescaler Initialize Bit
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PS{__NS}	bfield	TSCR{__NS},0,3	;  Prescaler Mux. Select
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		endm
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		restore
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		endif			; __timer1inc