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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | ifndef __st7spi2inc ; avoid multiple inclusion |
| 2 | __st7spi2inc equ 1 |
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| 3 | |||
| 4 | save |
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| 5 | listing off ; no listing over this file |
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| 6 | |||
| 7 | ;**************************************************************************** |
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| 8 | ;* * |
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| 9 | ;* AS 1.42 - File SPI.INC * |
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| 10 | ;* * |
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| 11 | ;* contains SFR and Bit Definitions for ST72xxx SPI * |
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| 12 | ;* * |
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| 13 | ;**************************************************************************** |
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| 14 | |||
| 15 | __defspi macro Base |
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| 16 | SPIDR label Base+$00 ; Data I/O Register |
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| 17 | SPICR label Base+$01 ; Control Register |
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| 18 | SPIE bit SPICR,7 ; Serial peripheral interrupt enable |
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| 19 | SPE bit SPICR,6 ; Serial peripheral output enable |
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| 20 | SPR2 bit SPICR,5 ; Divider Enable |
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| 21 | MSTR bit SPICR,4 ; Master |
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| 22 | CPOL bit SPICR,3 ; Clock polarity |
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| 23 | CPHA bit SPICR,2 ; Clock phase |
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| 24 | SPR1 bit SPICR,1 ; Serial peripheral rate |
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| 25 | SPR0 bit SPICR,0 |
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| 26 | SPICSR label Base+$02 ; Control/Status Register |
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| 27 | SPIF bit SPICSR,7 ; Serial Peripheral data transfer flag |
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| 28 | WCOL bit SPICSR,6 ; Write Collision status |
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| 29 | OVR bit SPICSR,5 ; Overrun error |
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| 30 | MODF bit SPICSR,4 ; Mode Fault flag |
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| 31 | SOD bit SPICSR,2 ; SPI Output Disable |
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| 32 | SSM bit SPICSR,1 ; /SS Management |
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| 33 | SSI bit SPICSR,0 ; /SS Internal Mode |
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| 34 | endm |
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| 35 | |||
| 36 | restore |
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| 37 | endif ; __st7spi2inc |