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Rev | Author | Line No. | Line |
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1186 | savelij | 1 | ifndef stddef47inc ; avoid multiple inclusion |
2 | stddef47inc equ 1 |
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3 | |||
4 | save |
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5 | listing off ; no listing over this file |
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6 | ;**************************************************************************** |
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7 | ;* * |
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8 | ;* AS 1.42 - File STDDEF47.INC * |
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9 | ;* * |
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10 | ;* Contains the "extended instruction set" for TLCS-47(0(A*)) Processors * * |
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11 | ;* * |
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12 | ;**************************************************************************** |
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13 | |||
14 | if (MOMCPU<>293888)&&(MOMCPU<>4656128)&&(MOMCPU<>74492928) |
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15 | fatal "wrong target selected: only 47C00, 470C00, oder 470AC00 allowed" |
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16 | endif |
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17 | |||
18 | if MOMPASS=1 |
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19 | message "TLCS-47 Macro Definitions" |
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20 | message "(C) 1994 Alfred Arnold" |
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21 | message "Target Processor: \{MOMCPU}" |
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22 | endif |
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23 | |||
24 | ;---------------------------------------------------------------------------- |
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25 | ; Conditional Jumps |
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26 | |||
27 | bz macro adr ; Compare and Branch if ZF=1 |
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28 | testp zf |
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29 | b adr |
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30 | endm |
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31 | |||
32 | |||
33 | bnz macro adr ; Compare and Branch if ZF=0 |
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34 | testp zf |
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35 | b s1 |
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36 | b adr |
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37 | s1: |
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38 | endm |
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39 | |||
40 | |||
41 | bc macro adr ; Compare and Branch if CF=1 |
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42 | testp cf |
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43 | b adr |
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44 | endm |
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45 | |||
46 | |||
47 | bnc macro adr ; Compare and Branch if CF=0 |
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48 | test cf |
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49 | b adr |
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50 | endm |
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51 | |||
52 | |||
53 | be macro dest,src,adr ; Compare and Branch if equal |
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54 | cmpr dest,src |
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55 | testp zf |
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56 | b adr |
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57 | endm |
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58 | |||
59 | |||
60 | bne macro dest,src,adr ; Compare and Branch if unequal |
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61 | cmpr dest,src |
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62 | if UpString("DEST")<>"A" |
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63 | testp zf |
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64 | b s1 |
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65 | endif |
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66 | b adr |
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67 | s1: |
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68 | endm |
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69 | |||
70 | |||
71 | bge macro dest,src,adr ; Compare and Branch if greater than or equal |
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72 | cmpr dest,src |
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73 | testp zf |
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74 | b adr |
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75 | test cf |
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76 | b adr |
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77 | endm |
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78 | |||
79 | |||
80 | bgt macro dest,src,adr ; Compare and Branch if greater than |
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81 | cmpr dest,src |
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82 | test cf |
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83 | b adr |
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84 | endm |
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85 | |||
86 | |||
87 | ble macro dest,src,adr ; Compare and Branch if less than or equal |
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88 | cmpr dest,src |
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89 | testp cf |
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90 | b adr |
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91 | endm |
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92 | |||
93 | |||
94 | blt macro dest,src,adr ; Compare and Branch if less than |
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95 | cmpr dest,src |
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96 | testp zf |
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97 | b s1 |
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98 | testp cf |
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99 | b adr |
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100 | s1: |
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101 | endm |
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102 | |||
103 | ;---------------------------------------------------------------------------- |
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104 | ; Sub Program Calls |
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105 | |||
106 | callss macro vector ; Via Vector |
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107 | if vector=0 |
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108 | calls 86h |
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109 | elseif |
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110 | calls (vector<<3)+6 |
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111 | endif |
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112 | endm |
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113 | |||
114 | |||
115 | callz macro adr ; If ZF=1 |
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116 | testp zf |
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117 | b s1 |
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118 | b s2 |
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119 | s1: call adr |
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120 | s2: |
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121 | endm |
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122 | |||
123 | |||
124 | callnz macro adr ; If ZF=0 |
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125 | testp zf |
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126 | b s1 |
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127 | call adr |
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128 | s1: |
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129 | endm |
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130 | |||
131 | |||
132 | callc macro adr ; If CF=1 |
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133 | test cf |
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134 | b s1 |
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135 | call adr |
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136 | s1: |
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137 | endm |
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138 | |||
139 | |||
140 | callnc macro adr ; If CF=0 |
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141 | testp cf |
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142 | b s1 |
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143 | call adr |
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144 | s1: |
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145 | endm |
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146 | |||
147 | ;---------------------------------------------------------------------------- |
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148 | ; Sub Program Returns |
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149 | |||
150 | retz macro ; If ZF=1 |
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151 | testp zf |
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152 | b s1 |
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153 | b s2 |
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154 | s1: ret |
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155 | s2: |
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156 | endm |
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157 | |||
158 | |||
159 | retnz macro ; If ZF=0 |
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160 | testp zf |
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161 | b s1 |
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162 | ret |
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163 | s1: |
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164 | endm |
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165 | |||
166 | |||
167 | retc macro ; If CF=1 |
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168 | test cf |
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169 | b s1 |
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170 | ret |
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171 | s1: |
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172 | endm |
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173 | |||
174 | |||
175 | retnc macro ; If CF=0 |
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176 | testp cf |
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177 | b s1 |
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178 | ret |
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179 | s1: |
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180 | endm |
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181 | |||
182 | ;---------------------------------------------------------------------------- |
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183 | ; Interrupt Returns |
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184 | |||
185 | retiz macro ; If ZF=1 |
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186 | testp zf |
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187 | b s1 |
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188 | b s2 |
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189 | s1: reti |
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190 | s2: |
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191 | endm |
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192 | |||
193 | |||
194 | retinz macro ; If ZF=0 |
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195 | testp zf |
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196 | b s1 |
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197 | reti |
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198 | s1: |
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199 | endm |
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200 | |||
201 | |||
202 | retic macro ; If CF=1 |
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203 | test cf |
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204 | b s1 |
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205 | reti |
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206 | s1: |
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207 | endm |
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208 | |||
209 | |||
210 | retinc macro ; If CF=0 |
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211 | testp cf |
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212 | b s1 |
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213 | reti |
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214 | s1: |
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215 | endm |
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216 | |||
217 | ;---------------------------------------------------------------------------- |
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218 | ; Extended Shift Instructions |
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219 | |||
220 | shl macro op,cnt ; Logical Shift Left |
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221 | if UpString("OP")<>"A" |
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222 | xch a,op |
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223 | endif |
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224 | rept cnt |
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225 | test cf |
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226 | rolc a |
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227 | endm |
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228 | if UpString("OP")<>"A" |
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229 | xch a,op |
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230 | endif |
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231 | endm |
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232 | |||
233 | shr macro op,cnt ; Logical Shift Right |
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234 | if UpString("OP")<>"A" |
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235 | xch a,op |
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236 | endif |
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237 | rept cnt |
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238 | test cf |
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239 | rorc a |
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240 | endm |
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241 | if UpString("OP")<>"A" |
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242 | xch a,op |
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243 | endif |
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244 | endm |
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245 | |||
246 | ;---------------------------------------------------------------------------- |
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247 | ; Interrupt Enable/Disable |
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248 | |||
249 | ei macro |
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250 | eiclr il,3fh |
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251 | endm |
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252 | |||
253 | di macro |
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254 | diclr il,3fh |
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255 | endm |
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256 | |||
257 | ;--------------------------------------------------------------------------- |
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258 | |||
259 | restore ; re-allow listing |
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260 | |||
261 | endif ; stddef47inc |