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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | page 0 |
| 2 | |||
| 3 | cpu 97c241 |
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| 4 | |||
| 5 | unlk |
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| 6 | szf |
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| 7 | svf |
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| 8 | ssf |
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| 9 | scf |
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| 10 | rzf |
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| 11 | rvf |
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| 12 | rsf |
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| 13 | rets |
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| 14 | reti |
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| 15 | ret |
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| 16 | rcf |
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| 17 | nop |
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| 18 | halt |
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| 19 | ei |
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| 20 | di |
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| 21 | czf |
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| 22 | cvf |
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| 23 | csf |
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| 24 | ccf |
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| 25 | |||
| 26 | Targ: jr Targ |
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| 27 | calr Targ |
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| 28 | jr $+1002h |
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| 29 | |||
| 30 | jrc z,Targ |
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| 31 | expect 1360 |
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| 32 | jrc zz,Targ |
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| 33 | endexpect |
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| 34 | jrc ult,Targ |
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| 35 | jrc ge,Targ |
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| 36 | |||
| 37 | jrbc 5,1234h,$+108h |
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| 38 | jrbs 1,345h,Targ |
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| 39 | |||
| 40 | djnz rw5,Targ |
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| 41 | djnz.d (123456h),$+100ah |
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| 42 | djnzc rw6,nov,Targ |
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| 43 | djnzc.d (rd2+123456h),eq,$+100ah |
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| 44 | |||
| 45 | link 20h |
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| 46 | link 3334h |
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| 47 | retd -122 |
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| 48 | retd -1234 |
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| 49 | |||
| 50 | swi 7 |
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| 51 | |||
| 52 | cpl rb2 |
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| 53 | cpl rw12 |
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| 54 | cpl rd14 |
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| 55 | |||
| 56 | cpl.b rb5 |
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| 57 | cpl.w rw15 |
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| 58 | cpl.d rd4 |
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| 59 | |||
| 60 | cpl.b (123h) |
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| 61 | cpl.w (123h) |
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| 62 | cpl.d (123h) |
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| 63 | |||
| 64 | cpl.b (123456h) |
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| 65 | cpl.w (123456h) |
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| 66 | cpl.d (123456h) |
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| 67 | |||
| 68 | cpl.b (rw2) |
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| 69 | cpl.w (rw5) |
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| 70 | cpl.d (rw0) |
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| 71 | |||
| 72 | cpl.b (rd10) |
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| 73 | cpl.w (rd6 ) |
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| 74 | cpl.d (rd12) |
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| 75 | |||
| 76 | cpl.b (rw4++) |
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| 77 | cpl.w (rw6++) |
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| 78 | cpl.d (rw9++) |
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| 79 | |||
| 80 | cpl.b (--rw8) |
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| 81 | cpl.w (--rw7) |
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| 82 | cpl.d (--rw5) |
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| 83 | |||
| 84 | cpl.b (rd2++) |
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| 85 | cpl.w (rd10++) |
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| 86 | cpl.d (rd14++) |
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| 87 | |||
| 88 | cpl.b (--rd4) |
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| 89 | cpl.w (--rd8) |
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| 90 | cpl.d (--rd12) |
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| 91 | |||
| 92 | cpl.b (rw3+123h) |
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| 93 | cpl.w (rw7+123h) |
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| 94 | cpl.d (rw1+123h) |
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| 95 | |||
| 96 | cpl.b (rd2-123h) |
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| 97 | cpl.w (rd8-123h) |
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| 98 | cpl.d (rd4-123h) |
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| 99 | |||
| 100 | cpl.b (rw4 +123456h) |
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| 101 | cpl.w (rw7 +123456h) |
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| 102 | cpl.d (rw14+123456h) |
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| 103 | |||
| 104 | cpl.b (rd6 -123456h) |
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| 105 | cpl.w (rd12-123456h) |
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| 106 | cpl.d (rd10-123456h) |
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| 107 | |||
| 108 | cpl.b (rw0+12h) |
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| 109 | cpl.w (rw0+12h) |
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| 110 | cpl.d (rw0+12h) |
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| 111 | |||
| 112 | cpl.b (rd0-12h) |
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| 113 | cpl.w (rd0-12h) |
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| 114 | cpl.d (rd0-12h) |
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| 115 | |||
| 116 | cpl.b (rw0+12345h) |
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| 117 | cpl.w (rw0+12345h) |
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| 118 | cpl.d (rw0+12345h) |
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| 119 | |||
| 120 | cpl.b (rd0-12345h) |
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| 121 | cpl.w (rd0-12345h) |
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| 122 | cpl.d (rd0-12345h) |
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| 123 | |||
| 124 | cpl.b (sp+12h) |
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| 125 | cpl.w (sp+12h) |
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| 126 | cpl.d (sp+12h) |
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| 127 | |||
| 128 | cpl.b (sp+89h) |
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| 129 | cpl.w (sp+89h) |
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| 130 | cpl.d (sp+89h) |
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| 131 | |||
| 132 | cpl.b (sp+12345h) |
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| 133 | cpl.w (sp+12345h) |
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| 134 | cpl.d (sp+12345h) |
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| 135 | |||
| 136 | cpl.b (pc-89h) |
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| 137 | cpl.w (pc-89h) |
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| 138 | cpl.d (pc-89h) |
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| 139 | |||
| 140 | cpl.b (pc-12345h) |
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| 141 | cpl.w (pc-12345h) |
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| 142 | cpl.d (pc-12345h) |
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| 143 | |||
| 144 | cpl.b (rw2 *4) |
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| 145 | cpl.w (rw5 *4) |
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| 146 | cpl.d (rw10*4) |
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| 147 | |||
| 148 | cpl.b (13h+rd10*8) |
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| 149 | cpl.w (rd14*8+12h) |
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| 150 | cpl.d (rd4 *8+12h) |
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| 151 | |||
| 152 | cpl.b (rw7*2-12345h) |
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| 153 | cpl.w (rw9*2-12345h) |
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| 154 | cpl.d (rw1*2-12345h) |
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| 155 | |||
| 156 | cpl.b (rd10*2+12345h) |
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| 157 | cpl.w (rd4 *2+12345h) |
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| 158 | cpl.d (rd6 *2+12345h) |
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| 159 | |||
| 160 | cpl.b (rw4 + rw6 *8 + 12h) |
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| 161 | cpl.w (rw5 + rd8 *4 + 12h) |
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| 162 | cpl.d (rd4 + rw9 *2 + 12h) |
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| 163 | cpl.b (rd10 + rd14 *1 + 12h) |
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| 164 | cpl.w (sp + rw5 *2 + 12h) |
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| 165 | cpl.d (sp + rd2 *4 + 12h) |
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| 166 | cpl.b (pc + rw11 *8 + 12h) |
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| 167 | cpl.w (pc + rd4 *4 + 12h) |
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| 168 | |||
| 169 | cpl sp |
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| 170 | cpl isp |
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| 171 | cpl esp |
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| 172 | cpl pbp |
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| 173 | cpl cbp |
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| 174 | cpl psw |
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| 175 | cpl imc |
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| 176 | cpl cc |
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| 177 | |||
| 178 | call targ |
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| 179 | call (rw2) |
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| 180 | call.w 123456h |
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| 181 | clr rb5 |
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| 182 | clr.w (rw3-4) |
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| 183 | clr.d (--rd2) |
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| 184 | exts rw1 |
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| 185 | exts.d (sp+20) |
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| 186 | extz.w (pc-7) |
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| 187 | extz.d rd12 |
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| 188 | jp Targ |
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| 189 | jp.w (rd4++) |
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| 190 | jp.d (--rw5) |
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| 191 | mirr rb1 |
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| 192 | mirr.w (Targ) |
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| 193 | mirr.d (sp+1234h) |
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| 194 | neg.d rd8 |
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| 195 | pop.b (rd10++) |
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| 196 | push.d 12345678h |
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| 197 | pusha Targ |
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| 198 | rvby.w (sp+rw4*4+0aah) |
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| 199 | tjp.d (rd6) |
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| 200 | tst.w rw13 |
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| 201 | |||
| 202 | lda rd6,(rd4+12345h) |
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| 203 | |||
| 204 | add3 rw4,(rd4),(rw2) |
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| 205 | sub3 rw4,(rd4),1000 |
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| 206 | add3 rw4,(rd4),100 |
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| 207 | sub3 rd2,rd10,(123456h) |
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| 208 | add3 rd8,(rw2*4+12345h),10 |
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| 209 | sub3 rb5,rb3,rb15 |
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| 210 | |||
| 211 | mac rw4,rb3,rb1 |
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| 212 | macs rd14,(rw4-2),(rd2+4) |
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| 213 | |||
| 214 | cpsz (rd6++),rb2,rw15 |
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| 215 | cpsn.w (--rd4),(--rd10),rw14 |
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| 216 | lds.d (rd8++),10,rw13 |
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| 217 | lds.w (--rd10),1000,rw12 |
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| 218 | |||
| 219 | rrm.b rb5,rw3,4 |
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| 220 | rlm.d (123456h),rw4,(123456h) |
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| 221 | |||
| 222 | bfex rw7,rd10,2,12 |
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| 223 | bfexs.b rw9,(rd4),4,6 |
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| 224 | bfin.w (sp+5),rw3,10,3 |
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| 225 | bfex rw10,rd12,20,5 |
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| 226 | bfexs.d rw12,(rd4),30,2 |
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| 227 | |||
| 228 | abcd rb5,(rw2*4) |
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| 229 | abcd rw4,(1234h) |
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| 230 | abcd (1234h),rd4 |
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| 231 | adc.w (rd4+2),(rd2*8+5) |
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| 232 | adc.b (Targ),4 |
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| 233 | cbcd.b (Targ),99h |
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| 234 | cpc rb5,(rw4+rw4) |
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| 235 | cpc rb5,(2) |
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| 236 | max rb5,rb2 |
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| 237 | maxs rw5,(Targ) |
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| 238 | min.d (Targ),(rw2) |
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| 239 | mins.d (rd4+3),(rd6-3) |
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| 240 | sbc.w (rd4),(rd2) |
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| 241 | sbc.d (Targ),1 |
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| 242 | sbcd rw4,(Targ) |
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| 243 | sbcd (rd2),rd0 |
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| 244 | |||
| 245 | andcf rw10,15 |
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| 246 | andcf.b (rd2),(rw4) |
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| 247 | andcf.d (rw10),(Targ) |
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| 248 | andcf.w (Targ),1 |
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| 249 | ldcf rw10,15 |
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| 250 | ldcf.b (rd2),(rw4) |
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| 251 | ldcf.d (rw10),(Targ) |
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| 252 | ldcf.w (Targ),1 |
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| 253 | orcf rw10,15 |
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| 254 | orcf.b (rd2),(rw4) |
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| 255 | orcf.d (rw10),(Targ) |
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| 256 | orcf.w (Targ),1 |
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| 257 | stcf rw10,15 |
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| 258 | stcf.b (rd2),(rw4) |
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| 259 | stcf.d (rw10),(Targ) |
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| 260 | stcf.w (Targ),1 |
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| 261 | tset rw10,15 |
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| 262 | tset.b (rd2),(rw4) |
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| 263 | tset.d (rw10),(Targ) |
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| 264 | tset.w (Targ),1 |
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| 265 | xorcf rw10,15 |
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| 266 | xorcf.b (rd2),(rw4) |
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| 267 | xorcf.d (rw10),(Targ) |
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| 268 | xorcf.w (Targ),1 |
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| 269 | |||
| 270 | bs0b rb10,rd12 |
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| 271 | bs0f (Targ),rw3 |
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| 272 | bs1b.w rb10,(Targ) |
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| 273 | bs1f.b (Targ),(rw10+2) |
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| 274 | |||
| 275 | chk.d:g (Targ),rd8 |
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| 276 | chk.d (Targ),rd8 |
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| 277 | chks.w (rd6),(rd4) |
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| 278 | chks.w (rw2),(Targ) |
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| 279 | |||
| 280 | mul rd2,rw1 |
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| 281 | muls.w (rw2),(Targ) |
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| 282 | div.d (Targ),(rw2) |
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| 283 | divs rw4,rb8 |
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| 284 | |||
| 285 | add rw11,2 |
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| 286 | add (rw4),rd8 |
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| 287 | add.w (rd4+2),(rd6+rd8*4+100) |
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| 288 | add.b rb2,150 |
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| 289 | add.w rw2,150 |
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| 290 | add.d rd2,150 |
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| 291 | add.d (Targ),2 |
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| 292 | add.w:a rw14,(Targ) ; !!! automatische Wahl sonst S |
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| 293 | |||
| 294 | ld rd10,2000 |
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| 295 | cp rd8,(Targ) |
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| 296 | sub.w (rd4++),(rd6++) |
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| 297 | |||
| 298 | and rw4,rw3 |
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| 299 | and.d rd10,rd12 |
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| 300 | or rd10,(rd8) |
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| 301 | or.w (Targ),(rd4+rw2*4-5) |
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| 302 | xor.d (Targ),12345678h |
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| 303 | xor rd2,1000h |
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| 304 | or rb2,rb7 |
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| 305 | and.w (Targ),rw4 |
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| 306 | xor.d (rw2),(Targ) |
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| 307 | |||
| 308 | bres rb4,1 |
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| 309 | bset rw7,5 |
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| 310 | bchg rw12,10 |
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| 311 | btst rd4,8 |
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| 312 | bres rd12,20 |
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| 313 | bset.w (rd4),10 |
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| 314 | bchg.d (rw2),15 |
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| 315 | btst.b (Targ),rb1 |
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| 316 | bres rb1,(Targ) |
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| 317 | |||
| 318 | ex rb1,rb7 |
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| 319 | ex rw5,(rd4) |
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| 320 | ex.d (Targ),(rw1) |
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| 321 | ex.b (rw1),(Targ) |
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| 322 | |||
| 323 | rl rw4,1 |
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| 324 | rlc.w (rd6*2),1 |
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| 325 | rr rd0,5 |
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| 326 | rrc rw1,(rd4) |
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| 327 | sla rw7,(Targ) |
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| 328 | sll.d (Targ),3 |
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| 329 | sra.w (rd4),(rw4) |
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| 330 | srl.b (rw4),(rd4) |
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| 331 | |||
| 332 | add.w (rw4+0eah),rw7 |
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| 333 | add.w (sp+rw4*4+1234h),(sp+28h) |
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| 334 | add.w:g (rw4+12345h),(10028h) |
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| 335 | add.w (rw4+12345h),(10028h) |
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| 336 | add.w:g (rw4+56h),3579h |
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| 337 | add.w (rw4+56h),3579h |
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| 338 | jrc nz,$-1234h |
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| 339 | |||
| 340 | add.w (rw4+>0eah),rw7 |
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| 341 | add.w (rw4->0eah),rw7 |
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| 342 | |||
| 343 | ; register aliases |
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| 344 | |||
| 345 | reg_rb0 reg rb0 |
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| 346 | reg_rb1 reg rb1 |
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| 347 | reg_rb2 reg rb2 |
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| 348 | reg_rb3 reg rb3 |
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| 349 | reg_rb4 reg rb4 |
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| 350 | reg_rb5 reg rb5 |
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| 351 | reg_rb6 reg rb6 |
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| 352 | reg_rb7 reg rb7 |
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| 353 | reg_rb8 reg rb8 |
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| 354 | reg_rb9 reg rb9 |
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| 355 | reg_rb10 reg rb10 |
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| 356 | reg_rb11 reg rb11 |
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| 357 | reg_rb12 reg rb12 |
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| 358 | reg_rb13 reg rb13 |
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| 359 | reg_rb14 reg rb14 |
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| 360 | reg_rb15 reg rb15 |
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| 361 | |||
| 362 | reg_rw0 equ rw0 |
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| 363 | reg_rw1 equ rw1 |
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| 364 | reg_rw2 equ rw2 |
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| 365 | reg_rw3 equ rw3 |
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| 366 | reg_rw4 equ rw4 |
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| 367 | reg_rw5 equ rw5 |
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| 368 | reg_rw6 equ rw6 |
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| 369 | reg_rw7 equ rw7 |
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| 370 | reg_rw8 equ rw8 |
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| 371 | reg_rw9 equ rw9 |
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| 372 | reg_rw10 equ rw10 |
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| 373 | reg_rw11 equ rw11 |
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| 374 | reg_rw12 equ rw12 |
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| 375 | reg_rw13 equ rw13 |
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| 376 | reg_rw14 equ rw14 |
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| 377 | reg_rw15 equ rw15 |
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| 378 | |||
| 379 | reg_rd0 equ rd0 |
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| 380 | reg_rd2 equ rd2 |
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| 381 | reg_rd4 equ rd4 |
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| 382 | reg_rd6 equ rd6 |
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| 383 | reg_rd8 equ rd8 |
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| 384 | reg_rd10 equ rd10 |
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| 385 | reg_rd12 equ rd12 |
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| 386 | reg_rd14 equ rd14 |
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| 387 | |||
| 388 | add.b rb2,150 |
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| 389 | add.b reg_rb2,150 |
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| 390 | add.w rw2,150 |
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| 391 | add.w reg_rw2,150 |
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| 392 | add.d rd2,150 |
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| 393 | add.d reg_rd2,150 |
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| 394 | or.w (Targ),(rd4+rw2*4-5) |
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| 395 | or.w (Targ),(reg_rd4+reg_rw2*4-5) |
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| 396 | bs0b rb10,rd12 |
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| 397 | bs0b reg_rb10,reg_rd12 |
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| 398 | bs0f (Targ),rw3 |
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| 399 | bs0f (Targ),reg_rw3 |
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| 400 | bs1b.w rb10,(Targ) |
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| 401 | bs1b.w reg_rb10,(Targ) |
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| 402 | bs1f.b (Targ),(rw10+2) |
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| 403 | bs1f.b (Targ),(reg_rw10+2) |
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| 404 | cpl.b (rw4 + rw6 *8 + 12h) |
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| 405 | cpl.b (reg_rw4 + reg_rw6 *8 + 12h) |
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| 406 | cpl.w (rw5 + rd8 *4 + 12h) |
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| 407 | cpl.w (reg_rw5 + reg_rd8 *4 + 12h) |
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| 408 | cpl.d (rd4 + rw9 *2 + 12h) |
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| 409 | cpl.d (reg_rd4 + reg_rw9 *2 + 12h) |
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| 410 | |||
| 411 | ;----------------------------------------------------- |
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| 412 | ; standard Intel/MASM-style pseudo instructions |
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| 413 | |||
| 414 | include "../t_dx/t_dn.inc" |
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| 415 | include "../t_dx/t_db.inc" |
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| 416 | include "../t_dx/t_dw.inc" |
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| 417 | include "../t_dx/t_dd.inc" |
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| 418 | include "../t_dx/t_dq.inc" |
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| 419 | include "../t_dx/t_dt.inc" |
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| 420 | include "../t_dx/t_do.inc" |