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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1088 | alone | 1 | #include "std.h" |
| 2 | |||
| 3 | #include "emul.h" |
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| 4 | #include "vars.h" |
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| 5 | #include "memory.h" |
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| 6 | #include "util.h" |
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| 7 | |||
| 8 | //============================================================================= |
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| 9 | void set_banks() // ���� ���� ��� � ������ ������ ���� if MM_ATM3 |
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| 10 | { // ��� ��� ����� �������� ��� ���� ������������� �������� |
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| 11 | // � ��� ����� ����� if MM_ATM3 |
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| 12 | // input: |
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| 13 | // ports 7FFD |
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| 14 | // 1FFD |
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| 15 | // DFFD |
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| 16 | // FFF7 |
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| 17 | // FF77 |
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| 18 | // EFF7 |
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| 19 | // |
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| 20 | // flags CF_TRDOS |
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| 21 | // CF_CACHEON |
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| 22 | |||
| 23 | bankw[1] = bankr[1] = RAM_BASE_M + 5 * PAGE; |
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| 24 | bankw[2] = bankr[2] = RAM_BASE_M + 2 * PAGE; |
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| 25 | |||
| 26 | // screen begining |
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| 27 | temp.base = memory + ((comp.p7FFD & 8) ? (7 * PAGE) : |
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| 28 | (5 * PAGE)); |
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| 29 | |||
| 30 | /* |
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| 31 | if(conf.mem_model == MM_QUORUM) |
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| 32 | temp.base = memory + (comp.p80FD & 7) * 0x2000 + 5*PAGE; |
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| 33 | */ |
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| 34 | |||
| 35 | if (temp.base_2) |
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| 36 | temp.base_2 = temp.base; |
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| 37 | |||
| 38 | // these flags will be re-calculated |
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| 39 | comp.flags &= ~(CF_DOSPORTS | CF_Z80FBUS | CF_LEAVEDOSRAM | CF_LEAVEDOSADR | CF_SETDOSROM); |
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| 40 | |||
| 41 | unsigned char *bank0, *bank3; |
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| 42 | |||
| 43 | //------------------------------------------------------------------------- |
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| 44 | // SHADOW |
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| 45 | if (comp.flags & CF_TRDOS) |
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| 46 | { |
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| 47 | if (comp.p7FFD & 0x10) |
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| 48 | { |
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| 49 | bank0 = base_dos_rom; |
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| 50 | } |
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| 51 | else |
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| 52 | { |
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| 53 | bank0 = base_sys_rom; |
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| 54 | } |
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| 55 | } |
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| 56 | //------------------------------------------------------------------------- |
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| 57 | // NO shadow |
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| 58 | else |
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| 59 | { |
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| 60 | bank0 = (comp.p7FFD & 0x10) ? base_sos_rom : |
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| 61 | base_128_rom; |
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| 62 | } |
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| 63 | //------------------------------------------------------------------------- |
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| 64 | |||
| 65 | unsigned bank = (comp.p7FFD & 7); |
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| 66 | |||
| 67 | //------------------------------------------------------------------------- |
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| 68 | switch (conf.mem_model) |
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| 69 | { |
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| 70 | //===================================================================== |
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| 71 | case MM_PENTAGON: |
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| 72 | //----------------------------------------------------------------- |
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| 73 | if (!(comp.pEFF7 & EFF7_LOCKMEM)) |
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| 74 | { |
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| 75 | // 7FFD bits |
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| 76 | // 210 - 128 |
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| 77 | // 6210 - 256 |
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| 78 | // 76210 - 512 |
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| 79 | // 576210 - 1024 |
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| 80 | bank |= (comp.p7FFD & 0xC0) >> 3; |
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| 81 | bank |= (comp.p7FFD & 0x20); |
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| 82 | } |
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| 83 | //----------------------------------------------------------------- |
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| 84 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 85 | //----------------------------------------------------------------- |
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| 86 | if (comp.pEFF7 & EFF7_ROCACHE) |
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| 87 | bank0 = RAM_BASE_M + 0 * PAGE; //Alone Coder 0.36.4 |
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| 88 | //----------------------------------------------------------------- |
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| 89 | break; |
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| 90 | //===================================================================== |
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| 91 | case MM_PROFSCORP: |
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| 92 | membits[0x0100] &= ~MEMBITS_R; |
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| 93 | membits[0x0104] &= ~MEMBITS_R; |
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| 94 | membits[0x0108] &= ~MEMBITS_R; |
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| 95 | membits[0x010C] &= ~MEMBITS_R; |
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| 96 | //----------------------------------------------------------------- |
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| 97 | case MM_SCORP: |
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| 98 | bank += ((comp.p1FFD & 0x10) >> 1) + ((comp.p1FFD & 0xC0) >> 2); |
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| 99 | |||
| 100 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 101 | /* |
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| 102 | // ��������� ������ gmx (����������� �� ����������� profrom) |
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| 103 | // ����� ������� ���� ������ � ���� 7EFD, � ���� ���� ���� ���� ������ |
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| 104 | // �� ������������ rom �� ��������� gmx |
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| 105 | comp.profrom_bank = ((comp.p7EFD >> 4) & 3) & temp.profrom_mask; |
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| 106 | { |
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| 107 | unsigned char *base = ROM_BASE_M + (comp.profrom_bank * 64*1024); |
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| 108 | base_128_rom = base + 0*PAGE; |
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| 109 | base_sos_rom = base + 1*PAGE; |
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| 110 | base_sys_rom = base + 2*PAGE; |
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| 111 | base_dos_rom = base + 3*PAGE; |
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| 112 | } |
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| 113 | */ |
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| 114 | //----------------------------------------------------------------- |
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| 115 | // ��������� �� ������ gmx (��������� ������ dos �� ���, ������� ������� �� ��� ��� � �������� �����) |
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| 116 | if (comp.p1FFD & 4) |
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| 117 | comp.flags |= CF_TRDOS; |
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| 118 | //----------------------------------------------------------------- |
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| 119 | if (comp.p1FFD & 2) |
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| 120 | bank0 = base_sys_rom; |
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| 121 | //----------------------------------------------------------------- |
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| 122 | if (comp.p1FFD & 1) |
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| 123 | bank0 = RAM_BASE_M + 0 * PAGE; |
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| 124 | //----------------------------------------------------------------- |
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| 125 | if (conf.mem_model == MM_PROFSCORP) |
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| 126 | { |
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| 127 | if (bank0 == base_sys_rom) |
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| 128 | comp.flags |= CF_PROFROM; |
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| 129 | else |
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| 130 | comp.flags &= ~CF_PROFROM; |
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| 131 | } |
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| 132 | break; |
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| 133 | //===================================================================== |
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| 134 | case MM_KAY: |
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| 135 | { |
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| 136 | bank += ((comp.p1FFD & 0x10) >> 1) + ((comp.p1FFD & 0x80) >> 3) + ((comp.p7FFD & 0x80) >> 2); |
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| 137 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 138 | unsigned char rom1 = (comp.p1FFD >> 2) & 2; |
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| 139 | //----------------------------------------------------------------- |
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| 140 | if (comp.flags & CF_TRDOS) |
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| 141 | rom1 ^= 2; |
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| 142 | //----------------------------------------------------------------- |
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| 143 | switch (rom1 + ((comp.p7FFD & 0x10) >> 4)) |
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| 144 | { |
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| 145 | //------------------------------------------------------------- |
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| 146 | case 0: |
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| 147 | bank0 = base_128_rom; |
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| 148 | break; |
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| 149 | //------------------------------------------------------------- |
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| 150 | case 1: |
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| 151 | bank0 = base_sos_rom; |
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| 152 | break; |
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| 153 | //------------------------------------------------------------- |
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| 154 | case 2: |
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| 155 | bank0 = base_sys_rom; |
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| 156 | break; |
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| 157 | //------------------------------------------------------------- |
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| 158 | case 3: |
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| 159 | bank0 = base_dos_rom; |
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| 160 | break; |
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| 161 | //------------------------------------------------------------- |
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| 162 | default: |
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| 163 | __assume(0); |
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| 164 | } |
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| 165 | //----------------------------------------------------------------- |
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| 166 | if (comp.p1FFD & 1) |
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| 167 | bank0 = RAM_BASE_M + 0*PAGE; |
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| 168 | //----------------------------------------------------------------- |
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| 169 | break; |
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| 170 | } |
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| 171 | //===================================================================== |
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| 172 | case MM_PROFI: |
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| 173 | bank += ((comp.pDFFD & 0x07U) << 3U); |
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| 174 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 175 | //----------------------------------------------------------------- |
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| 176 | if (comp.pDFFD & 0x08) // .... X... d3 |
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| 177 | { |
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| 178 | bankr[1] = bankw[1] = bank3; |
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| 179 | bank3 = RAM_BASE_M + (7 * PAGE); |
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| 180 | } |
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| 181 | //----------------------------------------------------------------- |
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| 182 | if (comp.pDFFD & 0x10) // ...X .... d4 |
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| 183 | { |
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| 184 | bank0 = RAM_BASE_M + (0 * PAGE); |
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| 185 | } |
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| 186 | //----------------------------------------------------------------- |
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| 187 | if (comp.pDFFD & 0x20) // ..X. .... d5 |
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| 188 | { |
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| 189 | comp.flags |= CF_DOSPORTS; |
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| 190 | } |
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| 191 | //----------------------------------------------------------------- |
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| 192 | if (comp.pDFFD & 0x40) // .X.. .... d6 |
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| 193 | { |
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| 194 | bankr[2] = bankw[2] = RAM_BASE_M + (6 * PAGE); |
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| 195 | } |
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| 196 | //----------------------------------------------------------------- |
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| 197 | break; |
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| 198 | //===================================================================== |
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| 199 | case MM_ATM450: |
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| 200 | { |
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| 201 | // RAM |
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| 202 | // original ATM uses D2 as ROM address extension, not RAM |
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| 203 | bank += ((comp.pFDFD & 0x07U) << 3U); |
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| 204 | bank3 = RAM_BASE_M + (bank & temp.ram_mask)*PAGE; |
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| 205 | |||
| 206 | //----------------------------------------------------------------- |
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| 207 | if (!(comp.aFE & 0x80)) |
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| 208 | { |
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| 209 | bankw[1] = bankr[1] = RAM_BASE_M + (4 * PAGE); |
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| 210 | bank0 = RAM_BASE_M; |
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| 211 | break; |
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| 212 | } |
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| 213 | //----------------------------------------------------------------- |
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| 214 | // ROM |
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| 215 | if (comp.p7FFD & 0x20) |
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| 216 | { |
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| 217 | comp.aFB &= ~0x80; |
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| 218 | } |
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| 219 | //----------------------------------------------------------------- |
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| 220 | if ((comp.flags & CF_TRDOS) && (comp.pFDFD & 8)) // SHADOW |
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| 221 | { |
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| 222 | comp.aFB |= 0x80; // more priority, then 7FFD |
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| 223 | } |
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| 224 | //----------------------------------------------------------------- |
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| 225 | // CPSYS signal |
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| 226 | if (comp.aFB & 0x80) |
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| 227 | { |
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| 228 | bank0 = base_sys_rom; |
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| 229 | break; |
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| 230 | } |
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| 231 | //----------------------------------------------------------------- |
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| 232 | // system rom not used on 7FFD.4=0 and DOS=1 |
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| 233 | if (comp.flags & CF_TRDOS) // SHADOWW |
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| 234 | bank0 = base_dos_rom; |
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| 235 | //----------------------------------------------------------------- |
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| 236 | break; |
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| 237 | } |
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| 238 | //===================================================================== |
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| 239 | case MM_ATM3: |
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| 240 | //----------------------------------------------------------------- |
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| 241 | if (comp.pBF & 1) // shaden |
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| 242 | { |
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| 243 | comp.flags |= CF_DOSPORTS; |
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| 244 | } |
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| 245 | //----------------------------------------------------------------- |
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| 246 | case MM_ATM710: |
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| 247 | { |
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| 248 | //----------------------------------------------------------------- |
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| 249 | if (!(comp.aFF77 & 0x200)) // ~cpm=0 |
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| 250 | comp.flags |= CF_TRDOS; |
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| 251 | //----------------------------------------------------------------- |
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| 252 | if (!(comp.aFF77 & 0x100)) |
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| 253 | { // pen=0 |
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| 254 | bankr[1] = bankr[2] = bank3 = bank0 = ROM_BASE_M + PAGE * temp.rom_mask; |
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| 255 | break; |
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| 256 | } |
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| 257 | //----------------------------------------------------------------- |
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| 258 | unsigned i = ((comp.p7FFD & 0x10) >> 2); |
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| 259 | |||
| 260 | for (unsigned bank = 0; bank < 4; bank++) |
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| 261 | { |
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| 262 | // lvd added 6 or 3 bits from 7FFD to page number insertion in pentevo (was only 3 as in atm2) |
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| 263 | unsigned int mem7ffd = (comp.p7FFD & 7) | ( (comp.p7FFD & 0xE0) >> 2 ); |
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| 264 | |||
| 265 | //------------------------------------------------------------- |
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| 266 | unsigned int mask7ffd = 0x07; //ATM2 // NEDOREPO |
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| 267 | |||
| 268 | if (conf.mem_model == MM_ATM3) |
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| 269 | { |
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| 270 | if (!(comp.pEFF7 & EFF7_LOCKMEM)) |
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| 271 | { |
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| 272 | mask7ffd = 0x3F; //ATM3 // NEDOREPO |
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| 273 | } |
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| 274 | } |
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| 275 | //------------------------------------------------------------- |
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| 276 | switch (comp.pFFF7[i+bank] & 0x300) |
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| 277 | { |
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| 278 | //--------------------------------------------------------- |
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| 279 | // RAM from 7FFD (lvd patched) |
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| 280 | case 0x000: |
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| 281 | // bankr[bank] = bankw[bank] = RAM_BASE_M + PAGE * ((comp.p7FFD & 7) | (comp.pFFF7[i+bank] & 0xF8 & temp.ram_mask)); |
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| 282 | // NEDOREPO |
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| 283 | bankr[bank] = bankw[bank] = RAM_BASE_M + PAGE * ((mem7ffd & mask7ffd) | (comp.pFFF7[i+bank] & (~mask7ffd) & temp.ram_mask)); |
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| 284 | break; |
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| 285 | //--------------------------------------------------------- |
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| 286 | // ROM from 7FFD |
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| 287 | case 0x100: |
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| 288 | bankr[bank] = ROM_BASE_M + PAGE*((comp.pFFF7[i+bank] & 0xFE & temp.rom_mask) + ((comp.flags & CF_TRDOS)?1:0)); |
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| 289 | break; |
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| 290 | //--------------------------------------------------------- |
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| 291 | // RAM from FFF7 |
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| 292 | case 0x200: |
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| 293 | bankr[bank] = bankw[bank] = RAM_BASE_M + PAGE*(comp.pFFF7[i+bank] & 0xFF & temp.ram_mask); |
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| 294 | break; |
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| 295 | //--------------------------------------------------------- |
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| 296 | // ROM from FFF7 |
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| 297 | case 0x300: |
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| 298 | bankr[bank] = ROM_BASE_M + PAGE*(comp.pFFF7[i+bank] & 0xFF & temp.rom_mask); |
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| 299 | break; |
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| 300 | //--------------------------------------------------------- |
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| 301 | } |
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| 302 | //------------------------------------------------------------- |
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| 303 | } |
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| 304 | //----------------------------------------------------------------- |
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| 305 | bank0 = bankr[0]; bank3 = bankr[3]; |
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| 306 | //----------------------------------------------------------------- |
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| 307 | |||
| 308 | // if(conf.mem_model == MM_ATM3 && cpu.nmi_in_progress) //0.39.0 |
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| 309 | // bank0 = RAM_BASE_M + PAGE * 0xFF; |
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| 310 | |||
| 311 | // lvd added pentevo RAM0 to bank0 feature if EFF7_ROCACHE is set |
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| 312 | if (conf.mem_model == MM_ATM3) |
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| 313 | { |
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| 314 | if (cpu.nmi_in_progress) |
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| 315 | { |
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| 316 | bank0 = RAM_BASE_M + PAGE * cpu.nmi_in_progress; |
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| 317 | } |
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| 318 | else if (comp.pEFF7 & EFF7_ROCACHE) |
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| 319 | { |
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| 320 | bank0 = RAM_BASE_M + PAGE * 0x00; |
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| 321 | } |
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| 322 | } |
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| 323 | break; |
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| 324 | } |
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| 325 | //===================================================================== |
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| 326 | case MM_PLUS3: |
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| 327 | { |
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| 328 | //----------------------------------------------------------------- |
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| 329 | if (comp.p7FFD & 0x20) // paging disabled (48k mode) |
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| 330 | { |
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| 331 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 332 | break; |
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| 333 | } |
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| 334 | //----------------------------------------------------------------- |
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| 335 | if (!(comp.p1FFD & 1)) |
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| 336 | { |
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| 337 | unsigned RomBank = ((comp.p1FFD & 4) >> 1) | ((comp.p7FFD & 0x10) >> 4); |
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| 338 | |||
| 339 | switch (RomBank) |
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| 340 | { |
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| 341 | case 0: |
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| 342 | bank0 = base_128_rom; |
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| 343 | break; |
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| 344 | case 1: |
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| 345 | bank0 = base_sys_rom; |
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| 346 | break; |
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| 347 | case 2: |
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| 348 | bank0 = base_dos_rom; |
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| 349 | break; |
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| 350 | case 3: |
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| 351 | bank0 = base_sos_rom; |
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| 352 | break; |
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| 353 | } |
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| 354 | // � ���������� bakn1, bank2 ??? |
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| 355 | // ����� 4-� �������� ������ |
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| 356 | |||
| 357 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 358 | } |
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| 359 | //----------------------------------------------------------------- |
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| 360 | else |
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| 361 | { |
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| 362 | unsigned RamPage = (comp.p1FFD >> 1) & 3; // d2,d1 |
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| 363 | static const unsigned RamDecoder[4][4] = |
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| 364 | { |
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| 365 | { 0, 1, 2, 3 }, |
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| 366 | { 4, 5, 6, 7 }, |
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| 367 | { 4, 5, 6, 3 }, |
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| 368 | { 4, 7, 6, 3 } |
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| 369 | }; |
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| 370 | // for(unsigned i = 0; i < 4; i++) |
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| 371 | // { |
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| 372 | // bankw[i] = bankr[i] = RAM_BASE_M + PAGE * RamDecoder[RamPage][i]; |
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| 373 | // } |
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| 374 | bankw[0] = bankr[0] = RAM_BASE_M + PAGE * RamDecoder[RamPage][0]; // [NS] |
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| 375 | bankw[1] = bankr[1] = RAM_BASE_M + PAGE * RamDecoder[RamPage][1]; // ��� ����� |
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| 376 | bankw[2] = bankr[2] = RAM_BASE_M + PAGE * RamDecoder[RamPage][2]; |
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| 377 | bankw[3] = bankr[3] = RAM_BASE_M + PAGE * RamDecoder[RamPage][3]; |
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| 378 | bank0 = bankr[0]; |
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| 379 | bank3 = bankr[3]; |
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| 380 | } |
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| 381 | break; |
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| 382 | } |
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| 383 | //===================================================================== |
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| 384 | case MM_QUORUM: |
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| 385 | { |
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| 386 | //----------------------------------------------------------------- |
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| 387 | if (!(comp.p00 & Q_TR_DOS)) |
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| 388 | comp.flags |= CF_DOSPORTS; // ���� �������� SHADOW MODE |
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| 389 | //----------------------------------------------------------------- |
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| 390 | if (comp.p00 & Q_B_ROM) |
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| 391 | { |
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| 392 | if (comp.flags & CF_TRDOS) |
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| 393 | { |
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| 394 | bank0 = base_dos_rom; |
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| 395 | } |
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| 396 | else |
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| 397 | { |
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| 398 | bank0 = (comp.p7FFD & 0x10) ? base_sos_rom : |
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| 399 | base_128_rom; |
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| 400 | } |
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| 401 | } |
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| 402 | //----------------------------------------------------------------- |
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| 403 | else |
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| 404 | { |
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| 405 | bank0 = base_sys_rom; |
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| 406 | } |
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| 407 | //----------------------------------------------------------------- |
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| 408 | if (comp.p00 & Q_F_RAM) |
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| 409 | { |
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| 410 | unsigned bnk0 = (comp.p00 & Q_RAM_8) ? 8 : |
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| 411 | 0; |
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| 412 | bank0 = RAM_BASE_M + (bnk0 & temp.ram_mask) * PAGE; |
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| 413 | } |
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| 414 | //----------------------------------------------------------------- |
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| 415 | bank |= ((comp.p7FFD & 0xC0) >> 3) | (comp.p7FFD & 0x20); |
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| 416 | bank3 = RAM_BASE_M + (bank & temp.ram_mask) * PAGE; |
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| 417 | //----------------------------------------------------------------- |
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| 418 | break; |
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| 419 | } |
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| 420 | //===================================================================== |
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| 421 | default: |
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| 422 | bank3 = RAM_BASE_M + 0 * PAGE; |
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| 423 | //===================================================================== |
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| 424 | } //SWITCH |
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| 425 | //------------------------------------------------------------------------- |
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| 426 | |||
| 427 | bankw[0] = bankr[0] = bank0; |
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| 428 | bankw[3] = bankr[3] = bank3; |
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| 429 | |||
| 430 | //------------------------------------------------------------------------- |
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| 431 | // ???????? |
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| 432 | if (bankr[0] >= ROM_BASE_M) bankw[0] = TRASH_M; |
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| 433 | if (bankr[1] >= ROM_BASE_M) bankw[1] = TRASH_M; |
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| 434 | if (bankr[2] >= ROM_BASE_M) bankw[2] = TRASH_M; |
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| 435 | if (bankr[3] >= ROM_BASE_M) bankw[3] = TRASH_M; |
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| 436 | //------------------------------------------------------------------------- |
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| 437 | unsigned char dosflags = CF_LEAVEDOSRAM; |
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| 438 | if ( (conf.mem_model == MM_PENTAGON) || |
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| 439 | (conf.mem_model == MM_PROFI) |
||
| 440 | ) |
||
| 441 | { |
||
| 442 | dosflags = CF_LEAVEDOSADR; |
||
| 443 | } |
||
| 444 | //------------------------------------------------------------------------- |
||
| 445 | if (comp.flags & CF_TRDOS) |
||
| 446 | { |
||
| 447 | comp.flags |= dosflags | CF_DOSPORTS; |
||
| 448 | } |
||
| 449 | //------------------------------------------------------------------------- |
||
| 450 | else if ((comp.p7FFD & 0x10) && (conf.trdos_present)) |
||
| 451 | { |
||
| 452 | // B-48, inactive DOS, DOS present |
||
| 453 | // for Scorp, ATM-1/2 and KAY, TR-DOS not started on executing RAM 3Dxx |
||
| 454 | if (!((dosflags & CF_LEAVEDOSRAM) && bankr[0] < RAM_BASE_M + PAGE * MAX_RAM_PAGES)) |
||
| 455 | { |
||
| 456 | comp.flags |= CF_SETDOSROM; |
||
| 457 | } |
||
| 458 | } |
||
| 459 | //------------------------------------------------------------------------- |
||
| 460 | if (comp.flags & CF_CACHEON) |
||
| 461 | { |
||
| 462 | unsigned char *cpage = CACHE_M; |
||
| 463 | if ((conf.cache == 32) && !(comp.p7FFD & 0x10)) |
||
| 464 | cpage += PAGE; |
||
| 465 | bankr[0] = bankw[0] = cpage; |
||
| 466 | // if (comp.pEFF7 & EFF7_ROCACHE) bankw[0] = TRASH_M; //Alone Coder 0.36.4 |
||
| 467 | } |
||
| 468 | //------------------------------------------------------------------------- |
||
| 469 | if ( (comp.flags & CF_DOSPORTS) ? conf.floatdos : |
||
| 470 | conf.floatbus |
||
| 471 | ) |
||
| 472 | { |
||
| 473 | comp.flags |= CF_Z80FBUS; |
||
| 474 | } |
||
| 475 | //------------------------------------------------------------------------- |
||
| 476 | // ???? |
||
| 477 | if ((temp.led.osw) && (trace_rom | trace_ram)) |
||
| 478 | { |
||
| 479 | for (unsigned i = 0; i < 4; i++) { |
||
| 480 | unsigned bank = unsigned((bankr[i] - RAM_BASE_M) / PAGE); |
||
| 481 | if (bank < MAX_PAGES) |
||
| 482 | used_banks[bank] = 1; |
||
| 483 | } |
||
| 484 | } |
||
| 485 | //------------------------------------------------------------------------- |
||
| 486 | /* |
||
| 487 | if ((unsigned)(bankr[0] - ROM_BASE_M) < PAGE*MAX_ROM_PAGES) |
||
| 488 | { |
||
| 489 | printf("ROM%2X\n", (bankr[0] - ROM_BASE_M)/PAGE); |
||
| 490 | printf("DOS=%p\n", base_dos_rom); |
||
| 491 | printf("SVM=%p\n", base_sys_rom); |
||
| 492 | printf("SOS=%p\n", base_sos_rom); |
||
| 493 | printf("128=%p\n", base_128_rom); |
||
| 494 | } |
||
| 495 | */ |
||
| 496 | //------------------------------------------------------------------------- |
||
| 497 | } |
||
| 498 | //============================================================================= |
||
| 499 | |||
| 500 | |||
| 501 | //============================================================================= |
||
| 502 | void set_scorp_profrom(unsigned read_address) |
||
| 503 | { |
||
| 504 | static unsigned char switch_table[] = |
||
| 505 | { |
||
| 506 | 0, 1, 2, 3, |
||
| 507 | 3, 3, 3, 2, |
||
| 508 | 2, 2, 0, 1, |
||
| 509 | 1, 0, 1, 0 |
||
| 510 | }; |
||
| 511 | comp.profrom_bank = switch_table[read_address*4 + comp.profrom_bank] & temp.profrom_mask; |
||
| 512 | unsigned char *base = ROM_BASE_M + (comp.profrom_bank * 64 * 1024); |
||
| 513 | base_128_rom = base + 0 * PAGE; |
||
| 514 | base_sos_rom = base + 1 * PAGE; |
||
| 515 | base_sys_rom = base + 2 * PAGE; |
||
| 516 | base_dos_rom = base + 3 * PAGE; |
||
| 517 | set_banks(); |
||
| 518 | } |
||
| 519 | //============================================================================= |
||
| 520 | |||
| 521 | |||
| 522 | //============================================================================= |
||
| 523 | /* |
||
| 524 | u8 *__fastcall MemDbg(u32 addr) |
||
| 525 | { |
||
| 526 | return am_r(addr); |
||
| 527 | } |
||
| 528 | |||
| 529 | void __fastcall wmdbg(u32 addr, u8 val) |
||
| 530 | { |
||
| 531 | *am_r(addr) = val; |
||
| 532 | } |
||
| 533 | |||
| 534 | u8 __fastcall rmdbg(u32 addr) |
||
| 535 | { |
||
| 536 | return *am_r(addr); |
||
| 537 | } |
||
| 538 | */ |
||
| 539 | //============================================================================= |
||
| 540 | |||
| 541 | |||
| 542 | //============================================================================= |
||
| 543 | void set_mode(ROM_MODE mode) |
||
| 544 | { |
||
| 545 | //------------------------------------------------------------------------- |
||
| 546 | if (mode == RM_NOCHANGE) |
||
| 547 | return; |
||
| 548 | //------------------------------------------------------------------------- |
||
| 549 | if (mode == RM_CACHE) |
||
| 550 | { |
||
| 551 | comp.flags |= CF_CACHEON; |
||
| 552 | set_banks(); |
||
| 553 | return; |
||
| 554 | } |
||
| 555 | //------------------------------------------------------------------------- |
||
| 556 | // no RAM/cache/SERVICE |
||
| 557 | comp.p1FFD &= ~7; |
||
| 558 | comp.pDFFD &= ~0x10; |
||
| 559 | comp.flags &= ~CF_CACHEON; |
||
| 560 | |||
| 561 | // comp.aFF77 |= 0x100; // enable ATM memory |
||
| 562 | |||
| 563 | //------------------------------------------------------------------------- |
||
| 564 | switch (mode) |
||
| 565 | { |
||
| 566 | //--------------------------------------------------------------------- |
||
| 567 | case RM_128: |
||
| 568 | comp.flags &= ~CF_TRDOS; |
||
| 569 | comp.p7FFD &= ~0x10; |
||
| 570 | break; |
||
| 571 | //--------------------------------------------------------------------- |
||
| 572 | case RM_SOS: |
||
| 573 | comp.flags &= ~CF_TRDOS; |
||
| 574 | comp.p7FFD |= 0x10; |
||
| 575 | |||
| 576 | if (conf.mem_model == MM_PLUS3) // disable paging |
||
| 577 | { |
||
| 578 | comp.p7FFD |= 0x20; |
||
| 579 | } |
||
| 580 | break; |
||
| 581 | //--------------------------------------------------------------------- |
||
| 582 | case RM_SYS: |
||
| 583 | comp.flags |= CF_TRDOS; |
||
| 584 | comp.p7FFD &= ~0x10; |
||
| 585 | break; |
||
| 586 | //--------------------------------------------------------------------- |
||
| 587 | case RM_DOS: |
||
| 588 | comp.flags |= CF_TRDOS; |
||
| 589 | |||
| 590 | // comp.p7FFD |= 0x10; //0.39.0 |
||
| 591 | if (conf.mem_model != MM_ATM710) // NEDOREPO |
||
| 592 | { |
||
| 593 | comp.p7FFD |= 0x10; |
||
| 594 | } |
||
| 595 | |||
| 596 | //����������� � NEDOREPO |
||
| 597 | // if (conf.mem_model == MM_ATM710 || conf.mem_model == MM_ATM3) |
||
| 598 | // { |
||
| 599 | // comp.p7FFD &= ~0x10; |
||
| 600 | // } |
||
| 601 | break; |
||
| 602 | //--------------------------------------------------------------------- |
||
| 603 | } |
||
| 604 | //------------------------------------------------------------------------- |
||
| 605 | set_banks(); |
||
| 606 | } |
||
| 607 | //============================================================================= |
||
| 608 | |||
| 609 | |||
| 610 | |||
| 611 | //============================================================================= |
||
| 612 | static unsigned char cmosBCD(unsigned char binary) |
||
| 613 | { |
||
| 614 | if (!(cmos[11] & 4)) |
||
| 615 | binary = (binary % 10) + 0x10 * ((binary / 10) % 10); |
||
| 616 | return binary; |
||
| 617 | } |
||
| 618 | //============================================================================= |
||
| 619 | |||
| 620 | |||
| 621 | |||
| 622 | //============================================================================= |
||
| 623 | unsigned char cmos_read() |
||
| 624 | { |
||
| 625 | static SYSTEMTIME st; |
||
| 626 | static bool UF = false; |
||
| 627 | static unsigned Seconds = 0; |
||
| 628 | static unsigned long long last_tsc = 0ULL; |
||
| 629 | unsigned char reg = comp.cmos_addr; |
||
| 630 | unsigned char rv; |
||
| 631 | //------------------------------------------------------------------------- |
||
| 632 | if (conf.cmos == 2) |
||
| 633 | reg &= 0x3F; |
||
| 634 | //------------------------------------------------------------------------- |
||
| 635 | if ((1 << reg) & ((1<<0)|(1<<2)|(1<<4)|(1<<6)|(1<<7)|(1<<8)|(1<<9)|(1<<12))) |
||
| 636 | { |
||
| 637 | unsigned long long tsc = rdtsc(); |
||
| 638 | // [vv] ���� �������� �� ���� ���� ��� � ������� |
||
| 639 | if ((tsc-last_tsc) >= 25 * temp.ticks_frame) |
||
| 640 | { |
||
| 641 | GetLocalTime(&st); |
||
| 642 | if (st.wSecond != Seconds) |
||
| 643 | { |
||
| 644 | UF = true; |
||
| 645 | Seconds = st.wSecond; |
||
| 646 | } |
||
| 647 | } |
||
| 648 | } |
||
| 649 | //------------------------------------------------------------------------- |
||
| 650 | // zxevo_ps2 |
||
| 651 | if (input.buffer_enabled && reg >= 0xF0) // thims |
||
| 652 | { |
||
| 653 | // debug |
||
| 654 | // int temp_input_key = input.buffer.Pop(); |
||
| 655 | // if (temp_input_key) |
||
| 656 | // //printf("ps2_key %X\n",temp_input_key); |
||
| 657 | // return temp_input_key; |
||
| 658 | return input.buffer.Pop(); // NEDOREPO |
||
| 659 | } |
||
| 660 | //------------------------------------------------------------------------- |
||
| 661 | switch (reg) |
||
| 662 | { |
||
| 663 | //--------------------------------------------------------------------- |
||
| 664 | case 0: |
||
| 665 | return cmosBCD((BYTE)st.wSecond); |
||
| 666 | //--------------------------------------------------------------------- |
||
| 667 | case 2: |
||
| 668 | return cmosBCD((BYTE)st.wMinute); |
||
| 669 | //--------------------------------------------------------------------- |
||
| 670 | case 4: |
||
| 671 | return cmosBCD((BYTE)st.wHour); |
||
| 672 | //--------------------------------------------------------------------- |
||
| 673 | case 6: |
||
| 674 | return 1+(((BYTE)st.wDayOfWeek+8-conf.cmos) % 7); |
||
| 675 | //--------------------------------------------------------------------- |
||
| 676 | case 7: |
||
| 677 | return cmosBCD((BYTE)st.wDay); |
||
| 678 | //--------------------------------------------------------------------- |
||
| 679 | case 8: |
||
| 680 | return cmosBCD((BYTE)st.wMonth); |
||
| 681 | //--------------------------------------------------------------------- |
||
| 682 | case 9: |
||
| 683 | return cmosBCD(st.wYear % 100); |
||
| 684 | //--------------------------------------------------------------------- |
||
| 685 | case 10: |
||
| 686 | return 0x20 | (cmos [10] & 0xF); // molodcov_alex |
||
| 687 | //--------------------------------------------------------------------- |
||
| 688 | case 11: |
||
| 689 | return (cmos[11] & 4) | 2; |
||
| 690 | //--------------------------------------------------------------------- |
||
| 691 | // UF // [vv] |
||
| 692 | case 12: |
||
| 693 | rv = UF ? 0x10 : 0; |
||
| 694 | UF = false; |
||
| 695 | return rv; |
||
| 696 | //--------------------------------------------------------------------- |
||
| 697 | case 13: |
||
| 698 | return 0x80; |
||
| 699 | //--------------------------------------------------------------------- |
||
| 700 | } |
||
| 701 | return cmos[reg]; |
||
| 702 | } |
||
| 703 | //============================================================================= |
||
| 704 | |||
| 705 | |||
| 706 | //============================================================================= |
||
| 707 | void cmos_write(unsigned char val) |
||
| 708 | { |
||
| 709 | //------------------------------------------------------------------------- |
||
| 710 | if (conf.cmos == 2) //512Bu1 |
||
| 711 | { |
||
| 712 | comp.cmos_addr &= 0x3F; |
||
| 713 | } |
||
| 714 | //------------------------------------------------------------------------- |
||
| 715 | if ((conf.mem_model == MM_ATM3) && (comp.cmos_addr == 0x0C)) //NEDOREPO |
||
| 716 | { |
||
| 717 | if (val & 0x01) |
||
| 718 | { |
||
| 719 | input.buffer.Empty(); |
||
| 720 | } |
||
| 721 | return; |
||
| 722 | } |
||
| 723 | //------------------------------------------------------------------------- |
||
| 724 | cmos[comp.cmos_addr] = val; |
||
| 725 | } |
||
| 726 | //============================================================================= |
||
| 727 | |||
| 728 | |||
| 729 | //============================================================================= |
||
| 730 | void NVRAM::write(unsigned char val) |
||
| 731 | { |
||
| 732 | const int SCL = 0x40; |
||
| 733 | const int SDA = 0x10; //WP = 0x20, |
||
| 734 | const int SDA_1 = 0xFF; |
||
| 735 | const int SDA_0 = 0xBF; |
||
| 736 | const int SDA_SHIFT_IN = 4; |
||
| 737 | |||
| 738 | if ((val ^ prev) & SCL) // clock edge, data in/out |
||
| 739 | { |
||
| 740 | //--------------------------------------------------------------------- |
||
| 741 | if (val & SCL) // nvram reads SDA |
||
| 742 | { |
||
| 743 | //----------------------------------------------------------------- |
||
| 744 | if (state == RD_ACK) |
||
| 745 | { |
||
| 746 | if (val & SDA) |
||
| 747 | goto idle; // no ACK, stop |
||
| 748 | // move next byte to host |
||
| 749 | state = SEND_DATA; |
||
| 750 | dataout = nvram[address]; |
||
| 751 | address = (address+1) & 0x7FF; |
||
| 752 | bitsout = 0; |
||
| 753 | goto exit; // out_z==1; |
||
| 754 | } |
||
| 755 | //----------------------------------------------------------------- |
||
| 756 | if ((1<<state) & ((1<<RCV_ADDR)|(1<<RCV_CMD)|(1<<RCV_DATA))) |
||
| 757 | { |
||
| 758 | if (out_z) // skip nvram ACK before reading |
||
| 759 | { |
||
| 760 | datain = 2 * datain + ((val >> SDA_SHIFT_IN) & 1); |
||
| 761 | bitsin++; |
||
| 762 | } |
||
| 763 | } |
||
| 764 | //----------------------------------------------------------------- |
||
| 765 | } |
||
| 766 | //--------------------------------------------------------------------- |
||
| 767 | // nvram sets SDA |
||
| 768 | else |
||
| 769 | { |
||
| 770 | if (bitsin == 8) // byte received |
||
| 771 | { |
||
| 772 | bitsin = 0; |
||
| 773 | //------------------------------------------------------------- |
||
| 774 | if (state == RCV_CMD) |
||
| 775 | { |
||
| 776 | if ((datain & 0xF0) != 0xA0) |
||
| 777 | goto idle; |
||
| 778 | address = (address & 0xFF) + ((datain << 7) & 0x700); |
||
| 779 | // read from current address |
||
| 780 | if (datain & 1) |
||
| 781 | { |
||
| 782 | dataout = nvram[address]; |
||
| 783 | address = (address+1) & 0x7FF; |
||
| 784 | bitsout = 0; |
||
| 785 | state = SEND_DATA; |
||
| 786 | } |
||
| 787 | else |
||
| 788 | { |
||
| 789 | state = RCV_ADDR; |
||
| 790 | } |
||
| 791 | } |
||
| 792 | //------------------------------------------------------------- |
||
| 793 | else if (state == RCV_ADDR) |
||
| 794 | { |
||
| 795 | address = (address & 0x700) + datain; |
||
| 796 | state = RCV_DATA; bitsin = 0; |
||
| 797 | } |
||
| 798 | //------------------------------------------------------------- |
||
| 799 | else if (state == RCV_DATA) |
||
| 800 | { |
||
| 801 | nvram[address] = datain; |
||
| 802 | address = (address & 0x7F0) + ((address+1) & 0x0F); |
||
| 803 | // state unchanged |
||
| 804 | } |
||
| 805 | //------------------------------------------------------------- |
||
| 806 | // EEPROM always acknowledges |
||
| 807 | out = SDA_0; |
||
| 808 | out_z = 0; |
||
| 809 | goto exit; |
||
| 810 | //------------------------------------------------------------- |
||
| 811 | } |
||
| 812 | //----------------------------------------------------------------- |
||
| 813 | if (state == SEND_DATA) |
||
| 814 | { |
||
| 815 | if (bitsout == 8) |
||
| 816 | { |
||
| 817 | state = RD_ACK; |
||
| 818 | out_z = 1; |
||
| 819 | goto exit; |
||
| 820 | } |
||
| 821 | out = (dataout & 0x80) ? SDA_1 : |
||
| 822 | SDA_0; |
||
| 823 | dataout *= 2; |
||
| 824 | bitsout++; |
||
| 825 | out_z = 0; |
||
| 826 | goto exit; |
||
| 827 | } |
||
| 828 | //----------------------------------------------------------------- |
||
| 829 | out_z = 1; // no ACK, reading |
||
| 830 | } |
||
| 831 | goto exit; |
||
| 832 | } |
||
| 833 | //------------------------------------------------------------------------- |
||
| 834 | if ((val & SCL) && ((val ^ prev) & SDA)) // start/stop |
||
| 835 | { |
||
| 836 | //--------------------------------------------------------------------- |
||
| 837 | // stop |
||
| 838 | if (val & SDA) |
||
| 839 | { |
||
| 840 | idle: state = IDLE; |
||
| 841 | } |
||
| 842 | //--------------------------------------------------------------------- |
||
| 843 | // start |
||
| 844 | else |
||
| 845 | { |
||
| 846 | state = RCV_CMD; |
||
| 847 | bitsin = 0; |
||
| 848 | } |
||
| 849 | //--------------------------------------------------------------------- |
||
| 850 | out_z = 1; |
||
| 851 | } |
||
| 852 | //------------------------------------------------------------------------- |
||
| 853 | // else SDA changed on low SCL |
||
| 854 | |||
| 855 | exit: |
||
| 856 | if (out_z) |
||
| 857 | { |
||
| 858 | out = (val & SDA) ? SDA_1 : |
||
| 859 | SDA_0; |
||
| 860 | } |
||
| 861 | prev = val; |
||
| 862 | } |
||
| 863 | //============================================================================= |
||
| 864 |