Rev 2 | Details | Compare with Previous | Last modification | View Log | RSS feed
Rev | Author | Line No. | Line |
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2 | lvd | 1 | яюЁЄ√ DMA: |
2 | |||
3 | DMA_HAD ; address[16..20] |
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4 | DMA_MAD ; address[8..15] |
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5 | DMA_LAD ; address[7..0] |
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6 | DMA_CST ; control and status register |
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7 | |||
8 | DMA_MOD ; DMA module to work with |
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9 | |||
10 | |||
11 | DMA_CST: bit7 - dma on. (=1 - on, =0 - off) |
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12 | bit6 |
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13 | bit5 |
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14 | bit4 |
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15 | bit3 |
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16 | bit2 |
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17 | bit1 |
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18 | bit0 |
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19 |