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#ifndef __RTC_H__
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#define __RTC_H__
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/**
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 * @file
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 * @brief RTC support.
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 * @author http://www.nedopc.com
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 *
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 * RTC PCF8583 support for ZX Evolution.
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 *
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 * ZX Evolution emulate Gluk clock standard:
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 * - full read/write time emulate;
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 * - full read/write nvram emulate;
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 * - registers A,B,C,D read only;
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 * - alarm functions not emulated.
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 *
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 * Save modes of ZX Evolution to RTC NVRAM.
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 */
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/** Address of PCF8583 RTC chip.*/
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#define RTC_ADDRESS  0xA0
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/** Register for year additional data. */
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#define RTC_YEAR_ADD_REG     0xFF
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/** Register for common modes. */
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#define RTC_COMMON_MODE_REG  0xFE
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/** Init RTC.*/
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void rtc_init(void);
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/**
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 * Write byte to RTC.
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 * @param addr [in] - address of internal register on RTC
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 * @param data [in] - data to write
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 */
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void rtc_write(UBYTE addr, UBYTE data);
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/**
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 * Read byte from RTC.
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 * @return data
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 * @param addr [in] - address of internal register on RTC
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 */
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UBYTE rtc_read(UBYTE addr);
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/** Seconds register index. */
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#define GLUK_REG_SEC        0x00
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/** Seconds alarm register index. */
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#define GLUK_REG_SEC_ALARM  0x01
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/** Minutes register index. */
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#define GLUK_REG_MIN        0x02
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/** Minutes alarm register index. */
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#define GLUK_REG_MIN_ALARM  0x03
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/** Hours register index. */
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#define GLUK_REG_HOUR       0x04
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/** Hours alarm register index. */
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#define GLUK_REG_HOUR_ALARM 0x05
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/** Day of week register index. */
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#define GLUK_REG_DAY_WEEK   0x06
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/** Day of month register index. */
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#define GLUK_REG_DAY_MONTH  0x07
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/** Month register index. */
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#define GLUK_REG_MONTH      0x08
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/** Year register index. */
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#define GLUK_REG_YEAR       0x09
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/** A register index. */
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#define GLUK_REG_A          0x0A
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/** B register index. */
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#define GLUK_REG_B          0x0B
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/** C register index. */
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#define GLUK_REG_C          0x0C
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/** D register index. */
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#define GLUK_REG_D          0x0D
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/** B register 2 bit - data mode (A 1 in DM signifies binary data while a 0 in DM specifies BCD data). */
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#define GLUK_B_DATA_MODE    0x04
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/** B register 1 bit - 24/12 mode (A 1 indicates the 24-hour mode and a 0 indicates the 12-hour mode). */
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#define GLUK_B_24_12_MODE   0x02
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/** C register 4 bit - Update-ended interrupt flag [UF] (Bit is set after each update cycle, UF is cleared by reading Register C or a RESET). */
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#define GLUK_C_UPDATE_FLAG  0x10
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/** Read values from RTC and setup Gluk clock registers. */
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void gluk_init(void);
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/** Increment Gluk clock registers on one second. */
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void gluk_inc(void);
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/**
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 * Get Gluk clock registers data.
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 * @return registers data
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 * @param index [in] - index of Gluck clock register
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 */
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UBYTE gluk_get_reg(UBYTE index);
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/**
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 * Set Gluk clock registers data.
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 * @param index [in] - index of Gluck clock register
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 * @param data [in] - data
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 */
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void gluk_set_reg(UBYTE index, UBYTE data);
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#endif //__RTC_H__