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1186 savelij 1 
		ifndef	__reg4414inc
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__reg4414inc	equ	1
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                save
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                listing off   ; kein Listing ueber diesen File
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;****************************************************************************
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;*                                                                          *
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;*   AS 1.42 - File REG4414.INC                                             *
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;*                                                                          *
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;*   Contains Bit & Register Definitions for AT90S4414                      *
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;*                                                                          *
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;****************************************************************************
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;----------------------------------------------------------------------------
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; Memory Limits
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E2END		equ	255
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RAMSTART	equ	0x60,data
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RAMEND		equ	0x15f,data
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FLASHEND	label	0xfff
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;----------------------------------------------------------------------------
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; Chip Configuration
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MCUCR		port	0x35		; MCU General Control Register
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SM		avrbit	MCUCR,4		; Choose Idle/Power Down Mode
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SE		avrbit	MCUCR,5		; Enable Sleep Mode
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SRW		avrbit	MCUCR,6		; Wait State Selection External SRAM
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SRE		avrbit	MCUCR,7		; Enable External SRAM
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;----------------------------------------------------------------------------
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; EEPROM
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		include	"ee90.inc"
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EEMWE		avrbit	EECR, 2		; EEPROM Master Write Enable
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;----------------------------------------------------------------------------
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; GPIO
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PINA		port	0x19		; Port A @ 0x19 (IO) ff.
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PINB		port	0x16		; Port B @ 0x16 (IO) ff.
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PINC		port	0x13		; Port C @ 0x13 (IO) ff.
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PIND		port	0x10		; Port D @ 0x10 (IO) ff.
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;----------------------------------------------------------------------------
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; Interrupt Vectors
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		enumconf 1,code
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		enum	 INT0_vect=1		; External Interrupt Request 0
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		nextenum INT1_vect		; External Interrupt Request 1
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		nextenum TIMER1_CAPT_vect	; Timer/Counter 1 Capture Event
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		nextenum TIMER1_COMPA_vect	; Timer/Counter 1 Compare Match A
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		nextenum TIMER1_COMPB_vect	; Timer/Counter 1 Compare Match B
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		nextenum TIMER1_OVF_vect	; Timer/Counter 1 Overflow
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		nextenum TIMER0_OVF_vect	; Timer/Counter 0 Overflow
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		nextenum SPI_STC_vect		; SPI Serial Transfer Complete
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		nextenum UART_RX_vect		; UART Rx Complete
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		nextenum UART_UDRE_vect		; UART Data Register Empty
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		nextenum UART_TX_vect		; UART Tx Complete
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		nextenum ANA_COMP_vect		; Analog Comparator
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;----------------------------------------------------------------------------
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; External Interrupts
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ISC00		avrbit	MCUCR,0		; External Interrupt 0 Sense Control
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ISC01		avrbit	MCUCR,1
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ISC10		avrbit	MCUCR,2		; External Interrupt 1 Sense Control
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ISC11		avrbit	MCUCR,3
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GIMSK		port	0x3b		; General Interrupt Mask Register
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INT0		avrbit	GIMSK,6		; Enable External Interrupt 0
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INT1		avrbit	GIMSK,7		; Enable External Interrupt 1
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GIFR		port	0x3a		; External Interrupt-Flags
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INTF0		avrbit	GIFR,6		; External Interrupt 0 Occured
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INTF1		avrbit	GIFR,7		; External Interrupt 1 Occured
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;----------------------------------------------------------------------------
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; Timers
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TCCR0		port	0x33		; Timer/Counter 0 Control Register
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CS00		avrbit	TCCR0,0		; Timer/Counter 0 Clock Select
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CS01		avrbit	TCCR0,1
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CS02		avrbit	TCCR0,2
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TCNT0		port	0x32		; Timer/Counter 0 Value
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TCCR1A		port	0x2f		; Timer/Counter 1 Control Register A
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PWM10		avrbit	TCCR1A,0	; Mode of Pulse Width Modulator
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PWM11		avrbit	TCCR1A,1
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COM1B0		avrbit	TCCR1A,4	; Timer/Counter 1 Compare Mode B
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COM1B1		avrbit	TCCR1A,5
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COM1A0		avrbit	TCCR1A,6	; Timer/Counter 1 Compare Mode A
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COM1A1		avrbit	TCCR1A,7
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TCCR1B		port	0x2e		; Timer/Counter 1 Control Register B
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CS10		avrbit	TCCR1B,0	; Timer/Counter 1 Clock Select
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CS11		avrbit	TCCR1B,1
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CS12		avrbit	TCCR1B,2
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CTC1		avrbit	TCCR1B,3	; Clear after Equality?
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ICES1		avrbit	TCCR1B,6	; Capture Slope Selection
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ICNC1		avrbit	TCCR1B,7	; Capture Noise Filter
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TCNT1L		port	0x2c		; Timer/Counter 1 Value LSB
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TCNT1H		port	0x2d		; Timer/Counter 1 Value MSB
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OCR1AL		port	0x2a		; Timer/Counter 1 Output Compare Value A LSB
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OCR1AH		port	0x2b		; Timer/Counter 1 Output Compare Value A MSB
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OCR1BL		port	0x28		; Timer/Counter 1 Output Compare Value B LSB
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OCR1BH		port	0x29		; Timer/Counter 1 Output Compare Value B MSB
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ICR1L		port	0x24		; Timer/Counter 1 Input Capture Value LSB
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ICR1H		port	0x25		; Timer/Counter 1 Input Capture Value MSB
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TIMSK		port	0x39		; Timer Interrupt Mask Register
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TOIE0		avrbit	TIMSK,1		; Timer/Counter 0 Overflow Interrupt Enable
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TICIE1		avrbit	TIMSK,3		; Timer/Counter 1 Input Capture Interrupt Enable
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OCIE1B		avrbit	TIMSK,5		; Timer/Counter 1 Output Compare Interrupt Enable B
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OCIE1A		avrbit	TIMSK,6		; Timer/Counter 1 Output Compare Interrupt Enable A
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TOIE1		avrbit	TIMSK,7		; Timer/Counter 1 Overflow Interrupt Enable
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TIFR		port	0x38		; Timer Interrupt Flag Register
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;----------------------------------------------------------------------------
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; Watchdog Timer
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		include	"wdm21.inc"
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WDTOE		avrbit	WDTCR,4		; Turn-Off Enable
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;----------------------------------------------------------------------------
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; UART
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		include	"uart90.inc"
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;----------------------------------------------------------------------------
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; SPI
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		include	"spi90.inc"
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;----------------------------------------------------------------------------
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; Analog Comparator
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		include "ac90.inc"
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		restore
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		endif			; __reg4414inc