WebSVN – pentevo – Blame – /tools/asl/asl-current/include/avr/regmxu4.inc

Rev	Author	Line No.	Line
1186	savelij	1	ifndef __regmxu4inc
		2	__regmxu4inc equ 1
		3	save
		4	listing off ; no listing over this file
		5
		6	;****************************************************************************
		7	;* *
		8	;* AS 1.42 - File REGMXU4.INC *
		9	;* *
		10	;* Contains Bit & Register Definitions for ATmega[16\|32]U4 *
		11	;* *
		12	;****************************************************************************
		13
		14	;----------------------------------------------------------------------------
		15	; Chip Configuration
		16
		17	MCUCR port 0x35 ; MCU General Control Register
		18	IVCE avrbit MCUCR,0 ; Interrupt Vector Change Enable
		19	IVSEL avrbit MCUCR,1 ; Interrupt Vector Select
		20
		21	SMCR port 0x33 ; Sleep Mode Control Register
		22	SE avrbit SMCR,0 ; Sleep Enable
		23	SM2 avrbit SMCR,3 ; Sleep Mode Select
		24	SM1 avrbit SMCR,2
		25	SM0 avrbit SMCR,1
		26
		27	MCUSR port 0x34 ; MCU Control and Status Register
		28	USBRF avrbit MCUSR,5 ; USB Reset Flag
		29	JTRF avrbit MCUSR,4 ; JTAG Reset Flag
		30	WDRF avrbit MCUSR,3 ; Watchdog Reset Occured
		31	BORF avrbit MCUSR,2 ; Brown-Out Occured
		32	EXTRF avrbit MCUSR,1 ; External Reset Occured
		33	PORF avrbit MCUSR,0 ; Power-On Reset Occured
		34
		35	OSCCAL sfr 0x66 ; Oscillator Calibration
		36
		37	RCCTRL sfr 0x67 ; Oscillator Control Register
		38	RCFREQ avrbit RCCTRL,0 ; RC Oscillator Frequency Select
		39
		40	PRR0 sfr 0x64 ; Power Reduction Register 0
		41	PRADC avrbit PRR0,0 ; Power Reduction A/D Converter
		42	PRSPI avrbit PRR0,2 ; Power Reduction SPI
		43	PRTIM1 avrbit PRR0,3 ; Power Reduction Timer/Counter 1
		44	PRTIM0 avrbit PRR0,5 ; Power Reduction Timer/Counter 0
		45	PRTWI avrbit PRR0,7 ; Power Reduction Two-Wire Interface
		46	PRR1 sfr 0x65 ; Power Reduction Register 1
		47	PRUSART1 avrbit PRR1,0 ; Power Reduction USART1
		48	PRTIM3 avrbit PRR1,3 ; Power Reduction Timer/Counter 3
		49	PRTIM4 avrbit PRR1,4 ; Power Reduction Timer/Counter 4
		50	PRUSB avrbit PRR1,7 ; Power Reduction USB
		51
		52	CLKPR sfr 0x61 ; Clock Prescale Register
		53	CLKPS0 avrbit CLKPR,0 ; Clock Prescaler Select Bits
		54	CLKPS1 avrbit CLKPR,1
		55	CLKPS2 avrbit CLKPR,2
		56	CLKPS3 avrbit CLKPR,3
		57	CLKPCE avrbit CLKPR,7 ; Clock Prescaler Change Enable
		58
		59	PLLCSR port 0x29 ; PLL Control and Status Register
		60	PLOCK avrbit PLLCSR,0 ; PLL Lock Detector
		61	PLLE avrbit PLLCSR,1 ; PLL Enable
		62	PINDIV avrbit PLLCSR,4 ; PLL Input Prescaler (1:1, 1:2)
		63
		64	PLLFRQ port 0x32 ; PLL Frequency Control Register
		65	PDIV0 avrbit PLLFRQ,0 ; PLL Lock Frequency
		66	PDIV1 avrbit PLLFRQ,1
		67	PDIV2 avrbit PLLFRQ,2
		68	PDIV3 avrbit PLLFRQ,3
		69	PLLTM0 avrbit PLLFRQ,4 ; PLL Postcaler for High Speed Timer
		70	PLLTM1 avrbit PLLFRQ,5
		71	PLLUSB avrbit PLLFRQ,6 ; PLL Postcaler for USB Peripheral
		72	PINMUX avrbit PLLFRQ,7 ; PLL Input Multiplexer
		73
		74	CLKSEL0 sfr 0xc5 ; Clock Selection Register 0
		75	CLKS avrbit CLKSEL0,0 ; Clock Selector
		76	EXTE avrbit CLKSEL0,2 ; Enable External Oscillator / Low Power Oscillator
		77	RCE avrbit CLKSEL0,3 ; Enable RC Oscillator
		78	EXSUT0 avrbit CLKSEL0,4 ; SUT for External Oscillator / Low Power Oscillator
		79	EXSUT1 avrbit CLKSEL0,5
		80	RCSUT0 avrbit CLKSEL0,6 ; SUT for RC Oscillator
		81	RCSUT1 avrbit CLKSEL0,7
		82
		83	CLKSEL1 sfr 0xc6 ; Clock Selection Register 1
		84	EXCKSEL0 avrbit CLKSEL1,0 ; CKSEL for External Oscillator / Low Power Oscillator
		85	EXCKSEL1 avrbit CLKSEL1,1
		86	EXCKSEL2 avrbit CLKSEL1,2
		87	EXCKSEL3 avrbit CLKSEL1,3
		88	RCCKSEL0 avrbit CLKSEL1,4 ; CKSEL for RC Oscillator
		89	RCCKSEL1 avrbit CLKSEL1,5
		90	RCCKSEL2 avrbit CLKSEL1,6
		91	RCCKSEL3 avrbit CLKSEL1,7
		92
		93	CLKSTA sfr 0xc7 ; Clock Status Register
		94	EXTON avrbit CLKSTA,0 ; External Oscillator / Low Power Oscillator On
		95	RCON avrbit CLKSTA,1 ; RC Oscillator On
		96
		97	;----------------------------------------------------------------------------
		98	; JTAG etc.
		99
		100	JTD avrbit MCUCR,7 ; JTAG disable
		101
		102	CRDR port 0x31 ; Monitor Data Register
		103	MONDR port 0x31
		104
		105	;----------------------------------------------------------------------------
		106	; EEPROM/Program Memory Access
		107
		108	include "eem2.inc"
		109
		110	EEPM0 avrbit EECR,4 ; EEPROM Programming Mode
		111	EEPM1 avrbit EECR,5
		112
		113	include "spmcsr37.inc"
		114
		115	SIGRD avrbit SPMCSR,5 ; Signature Read
		116
		117	RAMPZ port 0x3b ; RAM Pointer
		118	RAMPZ0 avrbit RAMPZ,0
		119	RAMPZ1 avrbit RAMPZ,1
		120
		121	;----------------------------------------------------------------------------
		122	; GPIO
		123
		124	PINB port 0x03 ; Port B @ 0x03 (IO) ff.
		125	PINC port 0x06 ; Port C @ 0x06 (IO) ff.
		126	__PORTC_BITS equ 0xc0 ; (bits 6..7)
		127	PIND port 0x09 ; Port D @ 0x09 (IO) ff.
		128	PINE port 0x0c ; Port E @ 0x0c (IO) ff.
		129	__PORTE_BITS equ 0x44 ; (bits 2,6)
		130	PINF port 0x0f ; Port F @ 0x0f (IO) ff.
		131	__PORTF_BITS equ 0xf3 ; (bits 0..1,4..7)
		132
		133	GPIOR0 port 0x1e ; General Purpose I/O Register 0
		134	GPIOR1 port 0x2a ; General Purpose I/O Register 1
		135	GPIOR2 port 0x2b ; General Purpose I/O Register 2
		136
		137	PUD avrbit MCUCR,4 ; Pullup Disable
		138
		139	PCMSK0 sfr 0x6b ; Pin Change Mask Register 0
		140
		141	PCICR sfr 0x68 ; Pin Change Control Register
		142
		143	PCIFR port 0x1b ; Pin Change Flag Register
		144
		145	;----------------------------------------------------------------------------
		146	; Interrupt Vectors
		147
		148	enumconf 2,code
		149	enum INT0_vect=2 ; External Interrupt Request 0
		150	nextenum INT1_vect ; External Interrupt Request 1
		151	nextenum INT2_vect ; External Interrupt Request 2
		152	nextenum INT3_vect ; External Interrupt Request 3
		153	nextenum Reserved1_vect ; Reserved
		154	nextenum Reserved2_vect ; Reserved
		155	nextenum INT6_vect ; External Interrupt Request 6
		156	nextenum Reserved3_vect ; Reserved
		157	nextenum PCINT0_vect ; Pin Change Interrupt Request 0
		158	nextenum USB_GEN_vect ; USB General Interrupt Request
		159	nextenum USB_COM_vect ; USB Endpoint Interrupt Request
		160	nextenum WDT_vect ; Watchdog Time-out Interrupt
		161	nextenum Reserved4_vect ; Reserved
		162	nextenum Reserved5_vect ; Reserved
		163	nextenum Reserved6_vect ; Reserved
		164	nextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capture
		165	nextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match A
		166	nextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match B
		167	nextenum TIMER1_COMPC_vect ; Timer/Counter 1 Compare Match C
		168	nextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflow
		169	nextenum TIMER0_COMPA_vect ; Timer/Counter 0 Compare Match A
		170	nextenum TIMER0_COMPB_vect ; Timer/Counter 0 Compare Match B
		171	nextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflow
		172	nextenum SPI_STC_vect ; SPI Serial Transfer Complete
		173	nextenum USART1_RX_vect ; USART1 Rx Complete
		174	nextenum USART1_UDRE_vect ; USART1 Data Register Empty
		175	nextenum USART1_TX_vect ; USART1 Tx Complete
		176	nextenum ANALOG_COMP_vect ; Analog Comparator
		177	nextenum ADC_vect ; ADC Conversion Complete
		178	nextenum EE_READY_vect ; EEPROM Ready
		179	nextenum TIMER3_CAPT_vect ; Timer/Counter 3 Capture
		180	nextenum TIMER3_COMPA_vect ; Timer/Counter 3 Compare Match A
		181	nextenum TIMER3_COMPB_vect ; Timer/Counter 3 Compare Match B
		182	nextenum TIMER3_COMPC_vect ; Timer/Counter 3 Compare Match C
		183	nextenum TIMER3_OVF_vect ; Timer/Counter 3 Overflow
		184	nextenum TWI_vect ; Two-Wire Serial Interface
		185	nextenum SPM_READY_vect ; Store Program Memory Ready
		186	nextenum TIMER4_COMPA_vect ; Timer/Counter 4 Compare Match A
		187	nextenum TIMER4_COMPB_vect ; Timer/Counter 4 Compare Match B
		188	nextenum TIMER4_COMPD_vect ; Timer/Counter 4 Compare Match D
		189	nextenum TIMER4_OVF_vect ; Timer/Counter 4 Overflow
		190	nextenum TIMER4_FPF_vect ; Timer/Counter 4 Fault Protection
		191
		192	;----------------------------------------------------------------------------
		193	; External Interrupts
		194
		195	EICRA sfr 0x69 ; External Interrupt Control Register A
		196	ISC00 avrbit EICRA,0 ; External Interrupt 0 Sense Control
		197	ISC01 avrbit EICRA,1
		198	ISC10 avrbit EICRA,2 ; External Interrupt 1 Sense Control
		199	ISC11 avrbit EICRA,3
		200	ISC20 avrbit EICRA,4 ; External Interrupt 2 Sense Control
		201	ISC21 avrbit EICRA,5
		202	ISC30 avrbit EICRA,6 ; External Interrupt 3 Sense Control
		203	ISC31 avrbit EICRA,7
		204	EICRB sfr 0x6a ; External Interrupt Control Register A
		205	ISC60 avrbit EICRB,4 ; External Interrupt 6 Sense Control
		206	ISC61 avrbit EICRB,5
		207
		208	EIMSK port 0x1d ; External Interrupt Mask Register
		209	INT0 avrbit EIMSK,0 ; External Interrupt Request 0 Enable
		210	INT1 avrbit EIMSK,1 ; External Interrupt Request 1 Enable
		211	INT2 avrbit EIMSK,2 ; External Interrupt Request 2 Enable
		212	INT3 avrbit EIMSK,3 ; External Interrupt Request 3 Enable
		213	INT6 avrbit EIMSK,6 ; External Interrupt Request 6 Enable
		214
		215	EIFR port 0x1c ; External Interrupt Flag Register
		216	INTF0 avrbit EIFR,0 ; External Interrupt 0 Occured
		217	INTF1 avrbit EIFR,1 ; External Interrupt 1 Occured
		218	INTF2 avrbit EIFR,2 ; External Interrupt 2 Occured
		219	INTF3 avrbit EIFR,3 ; External Interrupt 3 Occured
		220	INTF6 avrbit EIFR,6 ; External Interrupt 6 Occured
		221
		222	;----------------------------------------------------------------------------
		223	; Timers
		224
		225	TCCR0A port 0x24 ; Timer/Counter 0 Control Register A
		226	WGM00 avrbit TCCR0A,0 ; Timer/Counter 0 Waveform Generation Mode
		227	WGM01 avrbit TCCR0A,1
		228	COM0B0 avrbit TCCR0A,4 ; Timer/Counter 0 Compare Match Output B Mode
		229	COM0B1 avrbit TCCR0A,5
		230	COM0A0 avrbit TCCR0A,6 ; Timer/Counter 0 Compare Match Output A Mode
		231	COM0A1 avrbit TCCR0A,7
		232	TCCR0B port 0x25 ; Timer/Counter 0 Control Register B
		233	CS00 avrbit TCCR0B,0 ; Clock Select
		234	CS01 avrbit TCCR0B,1
		235	CS02 avrbit TCCR0B,2
		236	WGM02 avrbit TCCR0B,3
		237	FOC0B avrbit TCCR0B,6 ; Timer/Counter 0 Force Output Compare Match B
		238	FOC0A avrbit TCCR0B,7 ; Timer/Counter 0 Force Output Compare Match A
		239	TCNT0 port 0x26 ; Timer/Counter 0 Value
		240	OCR0A port 0x27 ; Timer/Counter 0 Output Compare Register A
		241	OCR0B port 0x28 ; Timer/Counter 0 Output Compare Register B
		242
		243	TCCR1A sfr 0x80 ; Timer/Counter 1 Control Register A
		244	WGM10 avrbit TCCR1A,0 ; Timer/Counter 1 Waveform Generation Mode
		245	WGM11 avrbit TCCR1A,1
		246	COM1C0 avrbit TCCR1A,2 ; Timer/Counter 1 Compare Mode C
		247	COM1C1 avrbit TCCR1A,3
		248	COM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode B
		249	COM1B1 avrbit TCCR1A,5
		250	COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode A
		251	COM1A1 avrbit TCCR1A,7
		252	TCCR1B sfr 0x81 ; Timer/Counter 1 Control Register B
		253	CS10 avrbit TCCR1B,0 ; Timer/Counter 1 Prescaler Setting
		254	CS11 avrbit TCCR1B,1
		255	CS12 avrbit TCCR1B,2
		256	WGM12 avrbit TCCR1B,3 ; Timer/Counter 1 Waveform Generation Mode
		257	WGM13 avrbit TCCR1B,4
		258	ICES1 avrbit TCCR1B,6 ; Timer/Counter 1 Capture Slope Selection
		259	ICNC1 avrbit TCCR1B,7 ; Timer/Counter 1 Capture Noise Filter
		260	TCCR1C sfr 0x82 ; Timer/Counter 1 Control Register C
		261	FOC1C avrbit TCCR1C,5 ; Timer/Counter 1 Force Output Compare C
		262	FOC1B avrbit TCCR1C,6 ; Timer/Counter 1 Force Output Compare B
		263	FOC1A avrbit TCCR1C,7 ; Timer/Counter 1 Force Output Compare A
		264	TCNT1L sfr 0x84 ; Timer/Counter 1 Value LSB
		265	TCNT1H sfr 0x85 ; Timer/Counter 1 Value MSB
		266	OCR1AL sfr 0x88 ; Timer/Counter 1 Output Compare Value A LSB
		267	OCR1AH sfr 0x89 ; Timer/Counter 1 Output Compare Value A MSB
		268	OCR1BL sfr 0x8a ; Timer/Counter 1 Output Compare Value B LSB
		269	OCR1BH sfr 0x8b ; Timer/Counter 1 Output Compare Value B MSB
		270	OCR1CL sfr 0x8c ; Timer/Counter 1 Output Compare Value C LSB
		271	OCR1CH sfr 0x8d ; Timer/Counter 1 Output Compare Value C MSB
		272	ICR1L sfr 0x86 ; Timer/Counter 1 Input Capture Value LSB
		273	ICR1H sfr 0x87 ; Timer/Counter 1 Input Capture Value MSB
		274
		275	TCCR3A sfr 0x90 ; Timer/Counter 3 Control Register A
		276	WGM30 avrbit TCCR3A,0 ; Timer/Counter 3 Waveform Generation Mode
		277	WGM31 avrbit TCCR3A,1
		278	COM3C0 avrbit TCCR3A,2 ; Timer/Counter 3 Compare Mode C
		279	COM3C1 avrbit TCCR3A,3
		280	COM3B0 avrbit TCCR3A,4 ; Timer/Counter 3 Compare Mode B
		281	COM3B1 avrbit TCCR3A,5
		282	COM3A0 avrbit TCCR3A,6 ; Timer/Counter 3 Compare Mode A
		283	COM3A1 avrbit TCCR3A,7
		284	TCCR3B sfr 0x91 ; Timer/Counter 3 Control Register B
		285	CS30 avrbit TCCR3B,0 ; Timer/Counter 3 Prescaler Setting
		286	CS31 avrbit TCCR3B,1
		287	CS32 avrbit TCCR3B,2
		288	WGM32 avrbit TCCR3B,3 ; Timer/Counter 3 Waveform Generation Mode
		289	WGM33 avrbit TCCR3B,4
		290	ICES3 avrbit TCCR3B,6 ; Timer/Counter 3 Capture Slope Selection
		291	ICNC3 avrbit TCCR3B,7 ; Timer/Counter 3 Capture Noise Filter
		292	TCCR3C sfr 0x92 ; Timer/Counter 3 Control Register C
		293	FOC3A avrbit TCCR3C,7 ; Timer/Counter 3 Force Output Compare A
		294	TCNT3L sfr 0x94 ; Timer/Counter 3 Value LSB
		295	TCNT3H sfr 0x95 ; Timer/Counter 3 Value MSB
		296	OCR3AL sfr 0x98 ; Timer/Counter 3 Output Compare Value A LSB
		297	OCR3AH sfr 0x99 ; Timer/Counter 3 Output Compare Value A MSB
		298	OCR3BL sfr 0x9a ; Timer/Counter 3 Output Compare Value B LSB
		299	OCR3BH sfr 0x9b ; Timer/Counter 3 Output Compare Value B MSB
		300	OCR3CL sfr 0x9c ; Timer/Counter 3 Output Compare Value C LSB
		301	OCR3CH sfr 0x9d ; Timer/Counter 3 Output Compare Value C MSB
		302	ICR3L sfr 0x96 ; Timer/Counter 3 Input Capture Value LSB
		303	ICR3H sfr 0x97 ; Timer/Counter 3 Input Capture Value MSB
		304
		305	TCCR4A sfr 0xc0 ; Timer/Counter 4 Control Register A
		306	PWM4B avrbit TCCR4A,0 ; Timer/Counter 4 Pulse Width Modulator B Enable
		307	PWM4A avrbit TCCR4A,1 ; Timer/Counter 4 Pulse Width Modulator A Enable
		308	FOC4B avrbit TCCR4A,2 ; Timer/Counter 4 Force Output Compare B
		309	FOC4A avrbit TCCR4A,3 ; Timer/Counter 4 Force Output Compare A
		310	COM4B0 avrbit TCCR4A,4 ; Timer/Counter 4 Compare Mode B
		311	COM4B1 avrbit TCCR4A,5
		312	COM4A0 avrbit TCCR4A,6 ; Timer/Counter 4 Compare Mode A
		313	COM4A1 avrbit TCCR4A,7
		314	TCCR4B sfr 0xc1 ; Timer/Counter 4 Control Register B
		315	CS40 avrbit TCCR4B,0 ; Timer/Counter 4 Clock Select
		316	CS41 avrbit TCCR4B,1
		317	CS42 avrbit TCCR4B,2
		318	CS43 avrbit TCCR4B,3
		319	DTPS40 avrbit TCCR4B,4 ; Timer/Counter 4 Dead Time Prescaler
		320	DTPS41 avrbit TCCR4B,5
		321	PSR4 avrbit TCCR4B,6 ; Timer/Counter 4 Prescaler Reset
		322	PWM4X avrbit TCCR4B,7 ; Timer/Counter 4 PWM Inversion Mode
		323	TCCR4C sfr 0xc2 ; Timer/Counter 4 Control Register C
		324	PWM4D avrbit TCCR4C,0 ; Timer/Counter 4 Pulse Width Modulator D Enable
		325	FOC4D avrbit TCCR4C,1 ; Timer/Counter 4 Force Output Compare D
		326	COM4D0 avrbit TCCR4C,2 ; Timer/Counter 4 Compare Mode D
		327	COM4D1 avrbit TCCR4C,3
		328	COMAB0S avrbit TCCR4C,4 ; Timer/Counter 4 Comparator B Output Mode
		329	COM4B1S avrbit TCCR4C,5
		330	COM4A0S avrbit TCCR4C,6 ; Timer/Counter 4 Comparator A Output Mode
		331	COM4A1S avrbit TCCR4C,7
		332	TCCR4D sfr 0xc3 ; Timer/Counter 4 Control Register D
		333	WGM40 avrbit TCCR4D,0 ; Timer/Counter 4 Waveform Generation Mode
		334	WGM41 avrbit TCCR4D,1
		335	FPF4 avrbit TCCR4D,2 ; Timer/Counter 4 Fault Protection Interrupt Flag
		336	FPAC4 avrbit TCCR4D,3 ; Timer/Counter 4 Fault Protection Analog Comparator Enable
		337	FPES4 avrbit TCCR4D,4 ; Timer/Counter 4 Fault Protection Edge Select
		338	FPNC4 avrbit TCCR4D,5 ; Timer/Counter 4 Fault Protection Noise Canceler
		339	FPEN4 avrbit TCCR4D,6 ; Timer/Counter 4 Fault Protection Mode Enable
		340	FPIE4 avrbit TCCR4D,7 ; Timer/Counter 4 Fault Protection Interrupt Enable
		341	TCCR4E sfr 0xc4 ; Timer/Counter 4 Control Register E
		342	OC4OE0 avrbit TCCR4E,0 ; Timer/Counter 4 Output Compare Override Enable
		343	OC4OE1 avrbit TCCR4E,1
		344	OC4OE2 avrbit TCCR4E,2
		345	OC4OE3 avrbit TCCR4E,3
		346	OC4OE4 avrbit TCCR4E,4
		347	OC4OE5 avrbit TCCR4E,5
		348	ENHC4 avrbit TCCR4E,6 ; Timer/Counter 4 Enhanced Compare/PWM Mode
		349	TLOCK4 avrbit TCCR4E,7 ; Timer/Counter 4 Register Update Lock
		350	TCNT4 sfr 0xbe ; Timer/Counter 4 Value
		351	TC4H sfr 0xbf ; Timer/Counter 4 Value MSB
		352	OCR4A sfr 0xcf ; Timer/Counter 4 Output Compare Value A
		353	OCR4B sfr 0xd0 ; Timer/Counter 4 Output Compare Value B
		354	OCR4C sfr 0xd1 ; Timer/Counter 4 Output Compare Value C
		355	OCR4D sfr 0xd2 ; Timer/Counter 4 Output Compare Value D
		356	DT4 sfr 0xd4 ; Timer/Counter 4 Dead Time Value
		357	DT4L0 avrbit DT4,0 ; Timer/Counter 4 Dead Time Value for /OC4x Output
		358	DT4L1 avrbit DT4,1
		359	DT4L2 avrbit DT4,2
		360	DT4L3 avrbit DT4,3
		361	DT4H0 avrbit DT4,4 ; Timer/Counter 4 Dead Time Value for OC4x Output
		362	DT4H1 avrbit DT4,5
		363	DT4H2 avrbit DT4,6
		364	DT4H3 avrbit DT4,7
		365
		366	TIMSK0 sfr 0x6e ; Timer/Counter 0 Interrupt Mask Register
		367	TOIE0 avrbit TIMSK0,0 ; Timer/Counter 0 Overflow Interrupt Enable
		368	OCIE0A avrbit TIMSK0,1 ; Timer/Counter 1 Output Compare Interrupt Enable A
		369	OCIE0B avrbit TIMSK0,2 ; Timer/Counter 1 Output Compare Interrupt Enable B
		370
		371	TIFR0 port 0x15 ; Timer/Counter 0 Interrupt Flag Register
		372
		373	TIMSK1 sfr 0x6f ; Timer/Counter 1 Interrupt Mask Register
		374	TOIE1 avrbit TIMSK1,0 ; Timer/Counter 1 Overflow Interrupt Enable
		375	OCIE1A avrbit TIMSK1,1 ; Timer/Counter 1 Output Compare Interrupt Enable A
		376	OCIE1B avrbit TIMSK1,2 ; Timer/Counter 1 Output Compare Interrupt Enable B
		377	OCIE1C avrbit TIMSK1,3 ; Timer/Counter 1 Output Compare Interrupt Enable C
		378	ICIE1 avrbit TIMSK1,5 ; Timer/Counter 1 Input Capture Interrupt Enable
		379
		380	TIFR1 port 0x16 ; Timer/Counter 1 Interrupt Flag Register
		381
		382	TIMSK3 sfr 0x71 ; Timer/Counter 3 Interrupt Mask Register
		383	TOIE3 avrbit TIMSK3,0 ; Timer/Counter 3 Overflow Interrupt Enable
		384	OCIE3A avrbit TIMSK3,1 ; Timer/Counter 3 Output Compare Interrupt Enable A
		385	OCIE3B avrbit TIMSK3,2 ; Timer/Counter 3 Output Compare Interrupt Enable B
		386	OCIE3C avrbit TIMSK3,3 ; Timer/Counter 3 Output Compare Interrupt Enable C
		387	ICIE3 avrbit TIMSK3,5 ; Timer/Counter 3 Input Capture Interrupt Enable
		388
		389	TIFR3 port 0x18 ; Timer/Counter 3 Interrupt Flag Register
		390
		391	TIMSK4 sfr 0x72 ; Timer/Counter 4 Interrupt Mask Register
		392	TOIE4 avrbit TIMSK4,2 ; Timer/Counter 4 Overflow Interrupt Enable
		393	OCIE4B avrbit TIMSK4,5 ; Timer/Counter 4 Output Compare Interrupt Enable B
		394	OCIE4A avrbit TIMSK4,6 ; Timer/Counter 4 Output Compare Interrupt Enable A
		395	OCIE4D avrbit TIMSK4,7 ; Timer/Counter 4 Output Compare Interrupt Enable D
		396
		397	TIFR4 port 0x19 ; Timer/Counter 4 Interrupt Flag Register
		398
		399	GTCCR port 0x23 ; General Timer/Counter Control Register
		400	PSRSYNC avrbit GTCCR,0 ; Prescaler Reset for Synchronous Timer/Counters
		401	PSRASY avrbit GTCCR,1
		402	TSM avrbit GTCCR,7 ; Timer/Counter Synchronization Mode
		403
		404	;----------------------------------------------------------------------------
		405	; Watchdog Timer
		406
		407	include "wdme.inc"
		408
		409	;----------------------------------------------------------------------------
		410	; USART
		411
		412	UDR1 sfr 0xce ; I/O Data Register
		413
		414	UCSR1A sfr 0xc8 ; Control & Status Register A
		415	MPCM1 avrbit UCSR1A,0 ; Multi Processor Communication Mode
		416	U2X1 avrbit UCSR1A,1 ; Double Transmission Speed
		417	PE1 avrbit UCSR1A,2 ; Parity Error
		418	DOR1 avrbit UCSR1A,3 ; Overrun
		419	FE1 avrbit UCSR1A,4 ; Framing Error
		420	UDRE1 avrbit UCSR1A,5 ; Data Register Empty
		421	TXC1 avrbit UCSR1A,6 ; Transmit Complete
		422	RXC1 avrbit UCSR1A,7 ; Receive Complete
		423
		424	UCSR1B sfr 0xc9 ; Control & Status Register B
		425	TXB81 avrbit UCSR1B,0 ; Transmit Bit 8
		426	RXB81 avrbit UCSR1B,1 ; Receive Bit 8
		427	UCSZ21 avrbit UCSR1B,2 ; Character Size
		428	TXEN1 avrbit UCSR1B,3 ; Enable Transmitter
		429	RXEN1 avrbit UCSR1B,4 ; Enable Receiver
		430	UDRIE1 avrbit UCSR1B,5 ; Enable Data Register Empty Interrupt
		431	TXCIE1 avrbit UCSR1B,6 ; Enable Transmit Complete Interrupt
		432	RXCIE1 avrbit UCSR1B,7 ; Enable Receive Complete Interrupt
		433
		434	UCSR1C sfr 0xca ; Control & Status Register C
		435	UCPOL1 avrbit UCSR1C,0 ; Clock Polarity
		436	UCSZ10 avrbit UCSR1C,1 ; Character Size
		437	UCSZ11 avrbit UCSR1C,2
		438	USBS1 avrbit UCSR1C,3 ; Stop Bit Select
		439	UPM10 avrbit UCSR1C,4 ; Parity Mode : Odd/Even
		440	UPM11 avrbit UCSR1C,5 ; Parity Mode : Enable/Disable
		441	UMSEL10 avrbit UCSR1C,6 ; USART Mode Select
		442	UMSEL11 avrbit UCSR1C,7
		443
		444	UCSR1D sfr 0xcb ; Control & Status Register D
		445	RTSEN avrbit UCSR1D,0 ; USART RTS Enable
		446	CTSEN avrbit UCSR1D,1 ; USART CTS Enable
		447
		448	UBRR1H sfr 0xcc ; Baud Rate Register High
		449	UBRR1L sfr 0xcd ; Baud Rate Register Low
		450
		451	;----------------------------------------------------------------------------
		452	; SPI
		453
		454	include "spim2c.inc"
		455
		456	;----------------------------------------------------------------------------
		457	; TWI
		458
		459	include "twimb8.inc"
		460
		461	;----------------------------------------------------------------------------
		462	; Analog Comparator
		463
		464	include "acm30.inc"
		465
		466	;----------------------------------------------------------------------------
		467	; A/D Converter
		468
		469	include "adcm78.inc"
		470
		471	MUX4 avrbit ADMUX,4
		472
		473	ADTS3 avrbit ADCSRB,3
		474	MUX5 avrbit ADCSRB,4
		475	ADHSM avrbit ADCSRB,7 ; A/D Converter High Speed Mode
		476
		477	DIDR2 sfr 0x7d ; Digital Input Disable Register 2
		478	ADC8D avrbit DIDR2,0 ; ADC8 Input Disable
		479	ADC9D avrbit DIDR2,1 ; ADC9 Input Disable
		480	ADC10D avrbit DIDR2,2 ; ADC10 Input Disable
		481	ADC11D avrbit DIDR2,3 ; ADC11 Input Disable
		482	ADC12D avrbit DIDR2,4 ; ADC12 Input Disable
		483	ADC13D avrbit DIDR2,5 ; ADC13 Input Disable
		484
		485	;----------------------------------------------------------------------------
		486	; USB
		487
		488	include "usbm.inc"
		489
		490	OTGPADE avrbit USBCON,4 ; VBUS Pad Enable
		491	VBUSTE avrbit USBCON,0 ; VBUS Transition Interrupt Enable Bit
		492
		493	LSM avrbit UDCON,2 ; USB Device Low Speed Mode Selection
		494	RSTCPU avrbit UDCON,3 ; USB Reset CPU Bit
		495
		496	MSOFI avrbit UDINT,1
		497
		498	MSOFE avrbit UDIEN,1
		499
		500	UHWCON sfr 0xd7 ; USB Hardware Control
		501	UVREGE avrbit UHWCON,0 ; USB Pad Regulator Enable
		502
		503	USBSTA sfr 0xd9 ;
		504	VBUS avrbit USBSTA,0 ; VBus Flag
		505	ID avrbit USBSTA,1 ; ID status
		506
		507	USBINT sfr 0xda ;
		508	VBUSTI avrbit USBINT,0 ; IVBUS Transition Interrupt Flag
		509
		510	UEBCHX sfr 0xf3 ; Byte Count High
		511
		512	restore ; re-enable Listing
		513
		514	endif ; __regmxu4inc

Subversion Repositories pentevo

(root)/tools/asl/asl-current/include/avr/regmxu4.inc – Rev 1186