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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 1186 | savelij | 1 | ifndef __stm8s001j3inc ; avoid multiple inclusion |
| 2 | __stm8s001j3inc equ 1 |
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| 3 | |||
| 4 | save |
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| 5 | listing off ; no listing over this file |
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| 6 | |||
| 7 | ;**************************************************************************** |
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| 8 | ;* * |
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| 9 | ;* AS 1.42 - File REG001J3.INC * |
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| 10 | ;* * |
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| 11 | ;* contains SFR and Bit Definitions for STM8S001J3 * |
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| 12 | ;* source: DS12129 Rev 3 * |
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| 13 | ;* * |
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| 14 | ;**************************************************************************** |
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| 15 | |||
| 16 | ;---------------------------------------------------------------------------- |
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| 17 | ; Memory Addresses |
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| 18 | |||
| 19 | E2START label $4000 ; start address internal EEPROM |
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| 20 | E2END label E2START+127 ; end " " " |
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| 21 | |||
| 22 | FLASHSTART label $8000 ; start address internal Flash |
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| 23 | |||
| 24 | RAMSTART label $0000 ; start address internal RAM |
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| 25 | RAMEND label $03ff ; end " " " |
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| 26 | |||
| 27 | ;---------------------------------------------------------------------------- |
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| 28 | ; Option Bytes |
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| 29 | |||
| 30 | OPT0 label $4800 ; Read-out protection |
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| 31 | ROP bfield OPT0,0,8 |
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| 32 | OPT1 label $4801 ; User boot code |
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| 33 | UBC bfield OPT1,0,8 |
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| 34 | NOPT1 label $4802 ; |
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| 35 | NUBC bfield NOPT1,0,8 |
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| 36 | OPT2 label $4803 ; Alternate function remapping |
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| 37 | AFR bfield OPT2,0,8 |
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| 38 | NOPT2 label $4804 ; |
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| 39 | NAFR bfield NOPT2,0,8 |
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| 40 | OPT3 label $4805 ; Misc. option |
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| 41 | OPT_HSITRIM bit OPT3,4 |
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| 42 | LSI_EN bit OPT3,3 |
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| 43 | IWDG_HW bit OPT3,2 |
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| 44 | WWDG_HW bit OPT3,1 |
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| 45 | WWDG_HALT bit OPT3,0 |
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| 46 | NOPT3 label $4806 |
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| 47 | NHSITRIM bit NOPT3,4 |
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| 48 | NLSI_EN bit NOPT3,3 |
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| 49 | NIWDG_HW bit NOPT3,2 |
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| 50 | NWWDG_HW bit NOPT3,1 |
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| 51 | NWWDG_HALT bit NOPT3,0 |
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| 52 | OPT4 label $4807 ; Clock option |
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| 53 | EXTCLK bit OPT4,3 |
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| 54 | CKAWUSEL bit OPT4,2 |
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| 55 | PRSC1 bit OPT4,1 |
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| 56 | PRSC0 bit OPT4,0 |
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| 57 | NOPT4 label $4808 |
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| 58 | NEXTCLK bit NOPT4,3 |
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| 59 | NCKAWUSEL bit NOPT4,2 |
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| 60 | NPRSC1 bit NOPT4,1 |
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| 61 | NPRSC0 bit NOPT4,0 |
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| 62 | OPT5 label $4809 ; HSE clock startup |
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| 63 | HSECNT bfield OPT5,0,8 |
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| 64 | NOPT5 label $480a |
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| 65 | NHSECNT bfield NOPT5,0,8 |
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| 66 | |||
| 67 | ;---------------------------------------------------------------------------- |
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| 68 | ; Vectors |
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| 69 | |||
| 70 | RESET_vect label $8000 ; Reset |
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| 71 | TRAP_vect label $8004 ; Software interrupt |
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| 72 | TLI_vect label $8008 ; External top level interrupt |
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| 73 | AWU_vect label $800c ; Auto wake up from halt |
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| 74 | CLK_vect label $8010 ; Clock controller |
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| 75 | EXTI0_vect label $8014 ; Port A external interrupts |
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| 76 | EXTI1_vect label $8018 ; Port B external interrupts |
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| 77 | EXTI2_vect label $801c ; Port C external interrupts |
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| 78 | EXTI3_vect label $8020 ; Port D external interrupts |
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| 79 | EXTI4_vect label $8024 ; Port E external interrupts |
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| 80 | SPI_vect label $8030 ; End of transfer |
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| 81 | TIM1_vect label $8034 ; TIM1 update/overflow/underflow/trigger/break |
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| 82 | TIM1_CAPT_vect label $8038 ; TIM1 capture/compare |
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| 83 | TIM2_vect label $803c ; TIM2 update /overflow |
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| 84 | TIM2_CAPT_vect label $8040 ; TIM2 capture/compare |
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| 85 | UART1_TX_vect label $804c ; Tx complete |
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| 86 | UART1_RX_vect label $8050 ; Receive register DATA FULL |
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| 87 | I2C_vect label $8054 ; I2C interrupt |
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| 88 | ADC1_vect label $8060 ; ADC1 end of conversion/analog watchdog interrupt |
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| 89 | TIM4_vect label $8064 ; TIM4 update/overflow |
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| 90 | FLASH_vect label $8068 ; EOP/WR_PG_DIS |
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| 91 | |||
| 92 | ;---------------------------------------------------------------------------- |
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| 93 | ; GPIO |
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| 94 | |||
| 95 | include "gpio.inc" |
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| 96 | __defgpio "PA",$5000 |
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| 97 | __defgpio "PB",$5005 |
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| 98 | __defgpio "PC",$500a |
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| 99 | __defgpio "PD",$500f |
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| 100 | __defgpio "PE",$5014 |
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| 101 | __defgpio "PF",$5019 |
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| 102 | |||
| 103 | ;---------------------------------------------------------------------------- |
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| 104 | ; Flash |
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| 105 | |||
| 106 | include "flash.inc" |
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| 107 | __defflash $505a |
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| 108 | |||
| 109 | ;---------------------------------------------------------------------------- |
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| 110 | ; Interrupt Controller |
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| 111 | |||
| 112 | include "itc.inc" |
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| 113 | __defexti $50a0,6 |
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| 114 | __defitc $7f70,30 |
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| 115 | |||
| 116 | ;---------------------------------------------------------------------------- |
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| 117 | ; Reset Controller |
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| 118 | |||
| 119 | include "rst.inc" |
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| 120 | __defrst $50b3 |
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| 121 | |||
| 122 | ;---------------------------------------------------------------------------- |
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| 123 | ; Clock Controller |
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| 124 | |||
| 125 | include "clk.inc" |
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| 126 | __defclk $50c0 |
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| 127 | |||
| 128 | ;---------------------------------------------------------------------------- |
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| 129 | ; Window Watchdog |
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| 130 | |||
| 131 | include "wwdg.inc" |
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| 132 | __defwwdg $50d1 |
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| 133 | |||
| 134 | ;---------------------------------------------------------------------------- |
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| 135 | ; Independent Watchdog |
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| 136 | |||
| 137 | include "iwdg.inc" |
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| 138 | __defiwdg $50e0 |
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| 139 | |||
| 140 | ;---------------------------------------------------------------------------- |
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| 141 | ; Beeper |
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| 142 | |||
| 143 | include "beep.inc" |
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| 144 | __defbeep $50f3 |
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| 145 | |||
| 146 | ;---------------------------------------------------------------------------- |
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| 147 | ; Serial Peripheral Interface |
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| 148 | |||
| 149 | include "spi.inc" |
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| 150 | __defspi $5200 |
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| 151 | |||
| 152 | ;---------------------------------------------------------------------------- |
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| 153 | ; I2C |
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| 154 | |||
| 155 | include "i2c.inc" |
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| 156 | __defi2c $5210 |
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| 157 | |||
| 158 | ;---------------------------------------------------------------------------- |
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| 159 | ; UART1 |
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| 160 | |||
| 161 | include "uart1.inc" |
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| 162 | __defusart1 "UART1",$5230 |
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| 163 | |||
| 164 | ;---------------------------------------------------------------------------- |
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| 165 | ; Timer 1 |
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| 166 | |||
| 167 | include "tim1.inc" |
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| 168 | __deftim1 $5250 |
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| 169 | |||
| 170 | ;---------------------------------------------------------------------------- |
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| 171 | ; Timer 2 |
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| 172 | |||
| 173 | include "tim2.inc" |
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| 174 | __deftim2 $5300,2 |
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| 175 | |||
| 176 | ;---------------------------------------------------------------------------- |
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| 177 | ; Timer 4 |
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| 178 | |||
| 179 | include "tim4.inc" |
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| 180 | __deftim4 $5340,2 |
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| 181 | |||
| 182 | ;---------------------------------------------------------------------------- |
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| 183 | ; A/D Converter 1 |
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| 184 | |||
| 185 | include "adc1.inc" |
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| 186 | __defadc1 "ADC",$53e0,$5400 |
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| 187 | |||
| 188 | ;---------------------------------------------------------------------------- |
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| 189 | ; CPU |
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| 190 | |||
| 191 | include "stm8/cpuregs.inc" |
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| 192 | __defcpuregs $7f00 |
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| 193 | |||
| 194 | ;---------------------------------------------------------------------------- |
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| 195 | ; Single Wire Interface Module |
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| 196 | |||
| 197 | include "stm8/swim.inc" |
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| 198 | __defswim $7f80 |
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| 199 | |||
| 200 | ;---------------------------------------------------------------------------- |
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| 201 | ; Debug Module |
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| 202 | |||
| 203 | include "stm8/dm.inc" |
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| 204 | __defdm $7f90 |
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| 205 | |||
| 206 | ;---------------------------------------------------------------------------- |
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| 207 | ; AWU |
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| 208 | |||
| 209 | include "awu.inc" |
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| 210 | __defawu $50f0 |
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| 211 | |||
| 212 | restore ; allow again |
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| 213 | |||
| 214 | endif ; __stm8s001j3inc |