Subversion Repositories pentevo

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
1186 savelij 1
		ifndef	__stm8s903f3inc	; avoid multiple inclusion
2
__stm8s903f3inc	equ	1
3
 
4
		save
5
		listing	off		; no listing over this file
6
 
7
;****************************************************************************
8
;*                                                                          *
9
;*   AS 1.42 - File REG903F3.INC                                            *
10
;*                                                                          *
11
;*   contains SFR and Bit Definitions for STM8S903F3/STM8S903K3             *
12
;*   source: DocID15590 Rev 12                                              *
13
;*                                                                          *
14
;****************************************************************************
15
 
16
;----------------------------------------------------------------------------
17
; Memory Addresses
18
 
19
E2START		label	$4000		; start address internal EEPROM
20
E2END		label	E2START+639	; end     "        "       "
21
 
22
FLASHSTART	label	$8000		; start address internal Flash
23
 
24
RAMSTART	label	$0000		; start address internal RAM
25
RAMEND		label	$03ff		; end     "        "      "
26
 
27
;----------------------------------------------------------------------------
28
; Option Bytes
29
 
30
OPT0		label	$4800		; Read-out protection
31
ROP		bfield	OPT0,0,8
32
OPT1		label	$4801		; User boot code
33
UBC		bfield	OPT1,0,8
34
NOPT1		label	$4802
35
NUBC		bfield	NOPT1,0,8
36
OPT2		label	$4803		; Alternate function remapping
37
AFR		bfield	OPT2,0,8
38
NOPT2		label	$4804
39
NAFR		bfield	NOPT2,0,8
40
OPT3		label	$4805		; Misc. option
41
OPT_HSITRIM	bit	OPT3,4		;  High speed internal clock trimming register size
42
LSI_EN		bit	OPT3,3		;  Low speed internal clock enable
43
IWDG_HW		bit	OPT3,2		;  Independent watchdog
44
WWDG_HW		bit	OPT3,1		;  Window watchdog activation
45
WWDG_HALT	bit	OPT3,0		;  Window watchdog reset on halt
46
NOPT3		label	$4806
47
NHSITRIM	bit	NOPT3,4
48
NLSI_EN		bit	NOPT3,3
49
NIWDG_HW	bit	NOPT3,2
50
NWWDG_HW	bit	NOPT3,1
51
NWWDG_HALT	bit	NOPT3,0
52
OPT4		label	$4807		; Clock option
53
EXTCLK		bit	OPT4,3		;  External clock selection
54
CKAWUSEL	bit	OPT4,2		;  Auto wake-up unit/clock
55
PRSC1		bit	OPT4,1		;  AWU clock prescaler
56
PRSC0		bit	OPT4,0		;  HSE crystal oscillator stabilization time
57
NOPT4		label	$4808
58
NEXTCLK		bit	NOPT4,3
59
NCKAWUSEL	bit	NOPT4,2
60
NPRSC1		bit	NOPT4,1
61
NPRSC0		bit	NOPT4,0
62
OPT5		label	$4809		; HSE clock startup
63
HSECNT		bfield	OPT5,0,8
64
NOPT5		label	$480a
65
NHSECNT		bfield	NOPT5,0,8
66
 
67
;----------------------------------------------------------------------------
68
; Vectors
69
 
70
RESET_vect	label	$8000		; Reset
71
TRAP_vect	label	$8004		; Software interrupt
72
TLI_vect	label	$8008		; External top level interrupt
73
AWU_vect	label	$800c		; Auto wake up from halt
74
CLK_vect	label	$8010		; Clock controller
75
EXTI0_vect	label	$8014		; Port A external interrupts
76
EXTI1_vect	label	$8018		; Port B external interrupts
77
EXTI2_vect	label	$801c		; Port C external interrupts
78
EXTI3_vect	label	$8020		; Port D external interrupts
79
EXTI4_vect	label	$8024		; Port E external interrupts
80
EXTI5_vect	label	$8028		; Port F external interrupts
81
SPI_vect	label	$8030		; End of transfer
82
TIM1_vect	label	$8034		; TIM1 update/overflow/underflow/trigger/break
83
TIM1_CAPT_vect	label	$8038		; TIM1 capture/compare
84
TIM5_vect	label	$803c		; TIM5 update /overflow
85
TIM5_CAPT_vect	label	$8040		; TIM5 capture/compare
86
UART1_TX_vect	label	$804c		; Tx complete
87
UART1_RX_vect	label	$8050		; Receive register DATA FULL
88
I2C_vect	label	$8054		; I2C interrupt
89
ADC1_vect	label	$8060		; ADC1 end of conversion/analog watchdog interrupt
90
TIM6_vect	label	$8064		; TIM6 update/overflow
91
FLASH_vect	label	$8068		; EOP/WR_PG_DIS
92
 
93
;----------------------------------------------------------------------------
94
; GPIO
95
 
96
		include	"gpio.inc"
97
		__defgpio "PA",$5000
98
		__defgpio "PB",$5005
99
		__defgpio "PC",$500a
100
		__defgpio "PD",$500f
101
		__defgpio "PE",$5014
102
		__defgpio "PF",$5019
103
 
104
;----------------------------------------------------------------------------
105
; Flash
106
 
107
		include	"flash.inc"
108
		__defflash $505a
109
 
110
;----------------------------------------------------------------------------
111
; Interrupt Controller
112
 
113
		include	"itc.inc"
114
		__defexti $50a0,6
115
		__defitc $7f70,30
116
 
117
;----------------------------------------------------------------------------
118
; Reset Controller
119
 
120
		include	"rst.inc"
121
		__defrst $50b3
122
 
123
;----------------------------------------------------------------------------
124
; Clock Controller
125
 
126
		include	"clk.inc"
127
		__defclk $50c0
128
 
129
;----------------------------------------------------------------------------
130
; Window Watchdog
131
 
132
		include	"wwdg.inc"
133
		__defwwdg $50d1
134
 
135
;----------------------------------------------------------------------------
136
; Independent Watchdog
137
 
138
		include	"iwdg.inc"
139
		__defiwdg $50e0
140
 
141
;----------------------------------------------------------------------------
142
; Beeper
143
 
144
		include	"beep.inc"
145
		__defbeep $50f3
146
 
147
;----------------------------------------------------------------------------
148
; Serial Peripheral Interface
149
 
150
		include	"spi.inc"
151
		__defspi $5200
152
 
153
;----------------------------------------------------------------------------
154
; I2C
155
 
156
		include	"i2c.inc"
157
		__defi2c $5210
158
 
159
;----------------------------------------------------------------------------
160
; UART1
161
 
162
		include "uart1.inc"
163
		__defusart1 "UART1",$5230
164
 
165
;----------------------------------------------------------------------------
166
; Timer 1
167
 
168
		include	"tim1.inc"
169
		__deftim1 $5250
170
 
171
;----------------------------------------------------------------------------
172
; Timer 5
173
 
174
		include	"tim5.inc"
175
		__deftim5 $5300
176
 
177
;----------------------------------------------------------------------------
178
; Timer 6
179
 
180
		include	"tim6.inc"
181
		__deftim6 $5340
182
 
183
;----------------------------------------------------------------------------
184
; A/D Converter 1
185
 
186
		include "adc1.inc"
187
		__defadc1 "ADC",$53e0,$5400
188
 
189
;----------------------------------------------------------------------------
190
; CPU
191
 
192
		include	"stm8/cpuregs.inc"
193
		__defcpuregs $7f00
194
 
195
;----------------------------------------------------------------------------
196
; Single Wire Interface Module
197
 
198
		include	"stm8/swim.inc"
199
		__defswim $7f80
200
 
201
;----------------------------------------------------------------------------
202
; Debug Module
203
 
204
		include	"stm8/dm.inc"
205
		__defdm	$7f90
206
 
207
;----------------------------------------------------------------------------
208
; AWU
209
 
210
		include	"awu.inc"
211
		__defawu $50f0
212
 
213
                restore                 ; allow again
214
 
215
                endif			; __stm8s903f3inc