Subversion Repositories pentevo

Rev

Details | Last modification | View Log | RSS feed

Rev Author Line No. Line
1186 savelij 1 
		ifndef	__regf082ainc
2 
__regf082ainc	equ	1
3 
                save
4 
		listing off		; no listing over this file
5 
 
6 
;****************************************************************************
7 
;*                                                                          *
8 
;*   AS 1.42 - File F082a.INC                                               *
9 
;*                                                                          *
10 
;*   Contains Bit & Register Definitions for Z8encore F082a                 *
11 
;*   Source: Z8 Encore! XP F082A Series Product Specification, PS022829-0814*
12 
;*                                                                          *
13 
;****************************************************************************
14 
 
15 
		include	"ez8com.inc"
16 
 
17 
;----------------------------------------------------------------------------
18 
; System Control
19 
 
20 
PWRCTL0		sfr	0f80h		; Power Control 0
21 
LPO		__z8bit PWRCTL0,7	;  Low-Power Operational Amplifier Disable
22 
VBO		__z8bit	PWRCTL0,4	;  Voltage Brown-Out Detector Disable
23 
TEMP		__z8bit	PWRCTL0,3	;  Temperature Sensor Disable
24 
		if	__hasadc
25 
ADC		__z8bit	PWRCTL0,2	; Analog-to-Digital Converter Disable
26 
		endif
27 
COMP		__z8bit	PWRCTL0,1	;  Comparator Disable
28 
 
29 
OSCCTL		sfr	0f86h		; Oscillator Control
30 
INTEN		__z8bit	OSCCTL,7	;  Internal Precision Oscillator Enable
31 
XTLEN		__z8bit	OSCCTL,6	;  Crystal Oscillator Enable
32 
WDTEN		__z8bit	OSCCTL,5	;  Watchdog Timer Oscillator Enable
33 
SOFEN		__z8bit	OSCCTL,4	;  System Oscillator Failure Detection Enable
34 
WDFEN		__z8bit	OSCCTL,3	;  Watchdog Timer Oscillator Failure Detection Enable
35 
SCKSEL		__z8bfield OSCCTL,0,3	;  System Clock Oscillator Select
36 
 
37 
TRMADR		sfr	0ff6h		; Trim Bit Address
38 
TRMDR		sfr	0ff7h		; Trim Data
39 
 
40 
;----------------------------------------------------------------------------
41 
; Flash Options
42 
 
43 
OPTIONS0	label	0000h
44 
WDT_RES		__z8cbit OPTIONS0,7	;  Watchdog Timer Reset
45 
WDT_AO		__z8cbit OPTIONS0,6	;  Watchdog Timer Always On
46 
OSC_SEL		__z8cbfield OPTIONS0,4,2 ;  Oscillator Mode Selection
47 
VBO_AO		__z8cbit OPTIONS0,3	;  Voltage Brown-Out Protection Always On
48 
 
49 
FRP		__z8cbit OPTIONS0,2	;  Flash Read Protect
50 
FWP		__z8cbit OPTIONS0,0	;  Flash Write Protect
51 
OPTIONS1	label	0001h
52 
XTLDIS		__z8cbit OPTIONS1,4	;  State of the Crystal Oscillator at Reset
53 
 
54 
;----------------------------------------------------------------------------
55 
; Interrupts Vectors
56 
 
57 
RESET_vect	label	0002h		; Reset (not an interrupt)
58 
WDT_vect	label	0004h		; Watchdog Timer
59 
ILL_INST_vect	label	0006h		; Illegal Instruction Trap (not an interrupt)
60 
TIMER1_vect	label	000ah		; Timer 1
61 
TIMER0_vect	label	000ch		; Timer 0
62 
UART_RX_vect	label	000eh		; UART Receiver
63 
UART_TX_vect	label	0010h		; UART Transmitter
64 
		if	__hasadc
65 
ADC_vect	label	0016h		; ADC
66 
		endif
67 
A7_vect		label	0018h		; Port A7, selectable rising or falling input edge or LVD
68 
A6_vect		label	001ah		; Port A6, selectable rising or falling input edge or Comparator Output
69 
A5_vect		label	001ch		; Port A5, selectable rising or falling input edge
70 
A4_vect		label	001eh		; Port A4, selectable rising or falling input edge
71 
A3_vect		label	0020h		; Port A3, selectable rising or falling input edge
72 
A2_vect		label	0022h		; Port A2, selectable rising or falling input edge
73 
A1_vect		label	0024h		; Port A1, selectable rising or falling input edge
74 
A0_vect		label	0026h		; Port A0, selectable rising or falling input edge
75 
C3_vect		label	0030h		; Port C3, both input edges
76 
C2_vect		label	0032h		; Port C2, both input edges
77 
C1_vect		label	0034h		; Port C1, both input edges
78 
C0_vect		label	0036h		; Port C0, both input edges
79 
PRIOSC_vect	label	003ah		; Primary Oscillator Fail Trap (not an interrupt)
80 
WDGOSC_vect	label	003ch		; Watchdog Oscillator Fail Trap (not an interrupt)
81 
 
82 
;----------------------------------------------------------------------------
83 
; Interrupts
84 
 
85 
__defirq	macro	NUM,Base
86 
IRQ{NUM}	sfr	Base+0		; Interrupt Request n
87 
IRQ{NUM}ENH	sfr	Base+1		; IRQn Enable High Bit
88 
IRQ{NUM}ENL	sfr	Base+2		; IRQn Enable Low Bit
89 
		endm
90 
 
91 
		__defirq "0",0fc0h
92 
		__defirq "1",0fc3h
93 
		__defirq "2",0fc6h
94 
 
95 
T1I		__z8bit IRQ0,6		;  Timer 1 Interrupt Request
96 
T0I		__z8bit IRQ0,5		;  Timer 0 Interrupt Request
97 
U0RXI		__z8bit	IRQ0,4		;  UART 0 Receiver Interrupt Request
98 
U0TXI		__z8bit	IRQ0,3		;  UART 0 Transmitter Interrupt Request
99 
		if	__hasadc
100 
ADCI		__z8bit IRQ0,0		;  ADC Interrupt Request
101 
		endif
102 
 
103 
T1ENH		__z8bit	IRQ0ENH,6	;  Timer 1 Interrupt Enable & Priority
104 
T1ENL		__z8bit	IRQ0ENL,6
105 
T0ENH		__z8bit	IRQ0ENH,5	;  Timer 0 Interrupt Enable & Priority
106 
T0ENL		__z8bit	IRQ0ENL,5
107 
U0RENH		__z8bit	IRQ0ENH,4	;  UART 0 Receive Interrupt Enable & Priority
108 
U0RENL		__z8bit	IRQ0ENL,4
109 
U0TENH		__z8bit	IRQ0ENH,3	;  UART 0 Transmit Interrupt Enable & Priority
110 
U0TENL		__z8bit	IRQ0ENL,3
111 
		if	__hasadc
112 
ADCENH		__z8bit	IRQ0ENH,0	;  ADC Interrupt Enable & Priority
113 
ADCENL		__z8bit	IRQ0ENL,0
114 
		endif
115 
 
116 
PA7VI		__z8bit	IRQ1,7		;  Port A7 Interrupt Request
117 
PA6CI		__z8bit	IRQ1,6		;  Port A6 or Comparator Interrupt Request
118 
PA5I		__z8bit	IRQ1,5		;  Port A5 Interrupt Request
119 
PA4I		__z8bit	IRQ1,4		;  Port A4 Interrupt Request
120 
PA3I		__z8bit	IRQ1,3		;  Port A3 Interrupt Request
121 
PA2I		__z8bit	IRQ1,2		;  Port A2 Interrupt Request
122 
PA1I		__z8bit	IRQ1,1		;  Port A1 Interrupt Request
123 
PA0I		__z8bit	IRQ1,0		;  Port A0 Interrupt Request
124 
 
125 
PA7VENH		__z8bit	IRQ1ENH,7	;  Port A7 Interrupt Enable & Priority
126 
PA7VENL		__z8bit	IRQ1ENL,7
127 
PA6CENH		__z8bit	IRQ1ENH,6	;  Port A6 Interrupt Enable & Priority
128 
PA6CENL		__z8bit	IRQ1ENL,6
129 
PA5ENH		__z8bit	IRQ1ENH,5	;  Port A5 Interrupt Enable & Priority
130 
PA5ENL		__z8bit	IRQ1ENL,5
131 
PA4ENH		__z8bit	IRQ1ENH,4	;  Port A4 Interrupt Enable & Priority
132 
PA4ENL		__z8bit	IRQ1ENL,4
133 
PA3ENH		__z8bit	IRQ1ENH,3	;  Port A3 Interrupt Enable & Priority
134 
PA3ENL		__z8bit	IRQ1ENL,3
135 
PA2ENH		__z8bit	IRQ1ENH,2	;  Port A2 Interrupt Enable & Priority
136 
PA2ENL		__z8bit	IRQ1ENL,2
137 
PA1ENH		__z8bit	IRQ1ENH,1	;  Port A1 Interrupt Enable & Priority
138 
PA1ENL		__z8bit	IRQ1ENL,1
139 
PA0ENH		__z8bit	IRQ1ENH,0	;  Port A0 Interrupt Enable & Priority
140 
PA0ENL		__z8bit	IRQ1ENL,0
141 
 
142 
PC3I		__z8bit	IRQ2,3		;  Port C3 Interrupt Request
143 
PC2I		__z8bit	IRQ2,2		;  Port C2 Interrupt Request
144 
PC1I		__z8bit	IRQ2,1		;  Port C1 Interrupt Request
145 
PC0I		__z8bit	IRQ2,0		;  Port C0 Interrupt Request
146 
 
147 
C3ENH		__z8bit	IRQ2ENH,3	;  Port C3 Interrupt Enable & Priority
148 
C3ENL		__z8bit	IRQ2ENL,3
149 
C2ENH		__z8bit	IRQ2ENH,2	;  Port C2 Interrupt Enable & Priority
150 
C2ENL		__z8bit	IRQ2ENL,2
151 
C1ENH		__z8bit	IRQ2ENH,1	;  Port C1 Interrupt Enable & Priority
152 
C1ENL		__z8bit	IRQ2ENL,1
153 
C0ENH		__z8bit	IRQ2ENH,0	;  Port C0 Interrupt Enable & Priority
154 
C0ENL		__z8bit	IRQ2ENL,0
155 
 
156 
IRQES		sfr	0fcdh		; Interrupt Edge Select
157 
IRQSS		sfr	0fceh		; Shared Interrupt Select
158 
PA7VS		__z8bit	IRQSS,7		;  PA7/LVD Selection
159 
PA6CS		__z8bit	IRQSS,6		;  PA6/Comparator Selection
160 
IRQCTL		sfr	0fcfh		; Interrupt Control
161 
IRQE		__z8bit	IRQCTL,7	;  Interrupt Request Enable
162 
 
163 
;----------------------------------------------------------------------------
164 
; Flash Memory Control
165 
 
166 
FCTL		sfr	0ff8h		; Flash Control
167 
FCMD		__z8bfield FCTL,0,8	;  Flash Command
168 
FSTAT		sfr	0ff8h		; Flash Status
169 
FPS		sfr	0ff9h		; Flash Page Select
170 
INFO_EN		__z8bit	FPS,7		;  Information Area Enable
171 
PAGE		__z8bfield FPS,0,7	;  Page Select
172 
FPROT		sfr	0ff9h		; Flash Sector Protect
173 
FFREQH		sfr	0ffah		; Flash Programming Frequency High Byte
174 
FFREQL		sfr	0ffbh		; Flash Programming Frequency Low Byte
175 
FFREQ		sfr	FFREQH
176 
 
177 
;----------------------------------------------------------------------------
178 
; GPIO
179 
 
180 
		__defgpio "A",0fd0h
181 
		__defgpio "B",0fd4h
182 
		__defgpio "C",0fd8h
183 
		__defgpio "D",0fdch	; TODO: PDIN does not exist
184 
 
185 
;----------------------------------------------------------------------------
186 
; LED Controller
187 
 
188 
LEDEN		sfr	0f82h		; LED Drive Enable
189 
LEDLVLH		sfr	0f83h		; LED Drive Level High
190 
LEDLVLL		sfr	0f84h		; LED Drive Level Low
191 
 
192 
;----------------------------------------------------------------------------
193 
; Timer
194 
 
195 
		__deftimer "0",0f00h,1,0
196 
		__deftimer "1",0f08h,1,0
197 
 
198 
;----------------------------------------------------------------------------
199 
; UART
200 
 
201 
		__defuart "0",0f40h
202 
 
203 
;----------------------------------------------------------------------------
204 
; Analog Comparator
205 
 
206 
CMP0		sfr	0f90h		; Comparator 0 Control
207 
INPSEL		__z8bit	CMP0,7		;  Signal Select for Positive Input
208 
INNSEL		__z8bit	CMP0,6		;  Signal Select for Negative Input
209 
REFLVL		__z8bfield CMP0,0,6	;  Internal Reference Voltage Level (b0/1 only on 8 pin devices)
210 
 
211 
;----------------------------------------------------------------------------
212 
; Analog/Digital Converter
213 
 
214 
		if	__hasadc
215 
ADCCTL0		sfr	0f70h		; ADC Control 0
216 
CEN		__z8bit	ADCCTL0,7	;  Conversion Enable
217 
REFSELL		__z8bit	ADCCTL0,6	;  Voltage Reference Level Select Low Bit
218 
REFOUT		__z8bit	ADCCTL0,5	;  Internal Reference Output Enable
219 
CONT		__z8bit ADCCTL0,4	;  Continuous Conversion
220 
ANAIN		__z8bfield ADCCTL0,0,3	;  Analog Input Select
221 
ADCCTL1		sfr	0f71h		; ADC Control 1
222 
REFSELH		__z8bit ADCCTL1,7	;  Voltage Reference Level Select High Bit
223 
BUFMODE		__z8bfield ADCCTL1,0,2	;  Input Buffer Mode Select
224 
ADCD_H		sfr	0f72h		; ADC Data High Byte
225 
ADCD_L		sfr	0f73h		; ADC Data Low Bits
226 
OVF		__z8bit	ADCD_L,0	;  Overflow Status
227 
ADCD		sfr	ADCD_H
228 
ADCSST		sfr	0f74h		; ADC Sample Settling Time
229 
SST		__z8bfield ADCSST,0,3	;  Sample Settling Time
230 
ADCST		sfr	0f75h		; ADC sample time
231 
ST		__z8bfield ADCST,0,6	;  Sample Time
232 
		endif			; __hasadc
233 
 
234 
;----------------------------------------------------------------------------
235 
; Watchdog Timer
236 
 
237 
RSTSTAT		sfr	0ff0h		; Reset Status
238 
POR		__z8bit	RSTSTAT,7	;  Power-On Reset Indicator
239 
STOP		__z8bit	RSTSTAT,6	;  Stop Mode Recovery Indicator
240 
WDT		__z8bit	RSTSTAT,5	;  Watchdog Timer Time-Out Indicator
241 
EXT		__z8bit	RSTSTAT,4	;  External Reset Indicator
242 
LVCD		__z8bit	RSTSTAT,,0	;  Low Voltage Detection Indicator
243 
WDTCTL		sfr	0ff0h		; Watchdog Timer Control
244 
WDTU		sfr	0ff1h		; Watchdog Timer Reload Upper Byte
245 
WDTH		sfr	0ff2h		; Watchdog Timer Reload High Byte
246 
WDTL		sfr	0ff3h		; Watchdog Timer Reload Low Byte
247 
 
248 
;----------------------------------------------------------------------------
249 
 
250 
		restore
251 
 
252 
		endif			; __regf082ainc