Subversion Repositories pentevo

Rev

Rev 796 | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
716 lvd 1
 
2
// └фЁхё ьюцхЄ яЁхт√°рЄ№ 0xFFFF
3
// (ўЄюс√ т ърцфющ ъюьрэфх ЁрсюЄ√ ё ЁхушёЄЁрьш эх фхырЄ№ &= 0xFFFF)
4
u8 xm(unsigned addr)
5
{
6
   addr &= 0xFFFF;
7
 
8
#ifdef MOD_GSZ80
9
   if (temp.gsdmaon && ((addr & 0xc000)==0) && (bankr[0] >= ROM_BASE_M))
10
    {
11
     u8 tmp = GSRAM_M[(temp.gsdmaaddr-1) & 0x1FFFFF];
12
     temp.gsdmaaddr++;
13
     temp.gsdmaaddr &= 0x1FFFFF;
14
     z80gs::flush_gs_z80();
15
     return tmp;
16
    }
17
#endif
18
 
19
   if((conf.mem_model == MM_ATM3) && (comp.pBF & 4) && ((addr & 0xF800) == 0)) // ╨рчЁх°хэр ЁрсюЄр ё ╬╟╙ °ЁшЇЄр фы  ATM3
20
   {
21
       unsigned idx = (addr >> 3) | ((addr & 7) << 8);
22
       return fontatm2[idx];
23
   }
24
 
25
   return *am_r(addr);
26
}
27
 
28
// └фЁхё ьюцхЄ яЁхт√°рЄ№ 0xFFFF
29
// (ўЄюс√ т ърцфющ ъюьрэфх ЁрсюЄ√ ё ЁхушёЄЁрьш эх фхырЄ№ &= 0xFFFF)
30
unsigned char rm(unsigned addr)
31
{
32
   addr &= 0xFFFF;
33
 
34
#ifdef Z80_DBG
35
   unsigned char *membit = membits + (addr & 0xFFFF);
36
   *membit |= MEMBITS_R;
37
   dbgbreak |= (*membit & MEMBITS_BPR);
38
   cpu.dbgbreak |= (*membit & MEMBITS_BPR);
39
#endif
40
 
41
   return xm(addr);
42
}
43
 
44
// └фЁхё ьюцхЄ яЁхт√°рЄ№ 0xFFFF
45
// (ўЄюс√ т ърцфющ ъюьрэфх ЁрсюЄ√ ё ЁхушёЄЁрьш эх фхырЄ№ &= 0xFFFF)
46
void wm(unsigned addr, unsigned char val)
47
{
48
   addr &= 0xFFFF;
49
 
50
#ifdef Z80_DBG
51
   unsigned char *membit = membits + (addr & 0xFFFF);
52
   *membit |= MEMBITS_W;
53
   dbgbreak |= (*membit & MEMBITS_BPW);
54
   cpu.dbgbreak |= (*membit & MEMBITS_BPW);
55
#endif
56
 
57
#ifdef MOD_GSZ80
58
   if (temp.gsdmaon && ((addr & 0xc000)==0) && (bankr[0] >= ROM_BASE_M))
59
    {
60
     GSRAM_M[temp.gsdmaaddr] = val;
61
     temp.gsdmaaddr++;
62
     temp.gsdmaaddr &= 0x1FFFFF;
63
     z80gs::flush_gs_z80();
64
    }
65
#endif
66
 
67
#ifdef MOD_VID_VD
68
   if (comp.vdbase && (unsigned)((addr & 0xFFFF) - 0x4000) < 0x1800)
69
   {
70
       comp.vdbase[addr & 0x1FFF] = val;
71
       return;
72
   }
73
#endif
74
 
75
   if((conf.mem_model == MM_ATM3) && (comp.pBF & 4) && ((addr & 0xF800) == 0)) // ╨рчЁх°хэр чруЁєчър °ЁшЇЄр фы  ATM3
76
   {
77
       unsigned idx = (addr >> 3) | ((addr & 7) << 8);
78
       fontatm2[idx] = val;
79
       update_screen();
80
       return;
81
   }
82
 
83
   unsigned char *a = bankw[(addr >> 14) & 3];
84
#ifndef TRASH_PAGE
85
   if (!a)
86
       return;
87
#endif
88
   a += (addr & (PAGE-1));
89
   if ((unsigned)(a - temp.base_2) < 0x1B00)
90
   {
91
      if (*a == val)
92
          return;
93
      update_screen();
94
   }
95
   *a = val;
96
}
97
 
98
Z80INLINE unsigned char m1_cycle(Z80 *cpu)
99
{
100
   if ((conf.mem_model == MM_PENTAGON) &&
101
       ((comp.pEFF7 & (EFF7_CMOS | EFF7_4BPP)) == (EFF7_CMOS | EFF7_4BPP)))
102
       temp.offset_vscroll++;
103
   if ((conf.mem_model == MM_PENTAGON) &&
104
      ((comp.pEFF7 & (EFF7_384 | EFF7_4BPP)) == (EFF7_384 | EFF7_4BPP)))
105
       temp.offset_hscroll++;
106
   cpu->r_low++;// = (cpu->r & 0x80) + ((cpu->r+1) & 0x7F);
107
   cpu->t += 4;
108
   return xm(cpu->pc++);
109
}
110
 
111
//#include "z80/cmd.cpp"
112
 
113
void Z80FAST step()
114
{
115
   if (comp.flags & CF_SETDOSROM)
116
   {
117
      if (cpu.pch == 0x3D)
118
      {
119
           comp.flags |= CF_TRDOS;
120
           set_banks();
121
      }
122
   }
123
   else if (comp.flags & CF_LEAVEDOSADR)
124
   {
125
      if (cpu.pch & 0xC0) // PC > 3FFF closes TR-DOS
126
      {
127
         close_dos: comp.flags &= ~CF_TRDOS;
128
         set_banks();
129
      }
130
      if (conf.trdos_traps)
131
          comp.wd.trdos_traps();
132
   }
133
   else if (comp.flags & CF_LEAVEDOSRAM)
134
   {
135
      // executing RAM closes TR-DOS
136
      if (bankr[(cpu.pc >> 14) & 3] < RAM_BASE_M+PAGE*MAX_RAM_PAGES)
137
          goto close_dos;
138
      if (conf.trdos_traps)
139
          comp.wd.trdos_traps();
140
   }
141
 
796 DimkaM 142
   if (conf.tape_traps && (cpu.pc & 0xFFFF) == 0x056B)
716 lvd 143
       tape_traps();
144
 
796 DimkaM 145
   if (!comp.tape.stopped && !conf.sound.enabled)
716 lvd 146
       fast_tape();
147
 
148
//todo if(comp.turbo)cpu.t-=tbias[cpu.dt]
149
   if (cpu.pch & temp.evenM1_C0)
150
       cpu.t += (cpu.t & 1);
151
//~todo
152
//[vv]   unsigned oldt=cpu.t; //0.37
153
   unsigned char opcode = m1_cycle(&cpu);
154
   (normal_opcode[opcode])(&cpu);
155
 
156
/* [vv]
157
//todo if(comp.turbo)cpu.t-=tbias[cpu.t-oldt]
158
   if( ((conf.mem_model == MM_PENTAGON) && ((comp.pEFF7 & EFF7_GIGASCREEN)==0)) ||
159
       ((conf.mem_model == MM_ATM710) && (comp.pFF77 & 8)))
160
       cpu.t -= (cpu.t-oldt) >> 1; //0.37
161
//~todo
162
*/
163
#ifdef Z80_DBG
164
   if ((comp.flags & CF_PROFROM) && ((membits[0x100] | membits[0x104] | membits[0x108] | membits[0x10C]) & MEMBITS_R))
165
   {
166
      if (membits[0x100] & MEMBITS_R)
167
          set_scorp_profrom(0);
168
      if (membits[0x104] & MEMBITS_R)
169
          set_scorp_profrom(1);
170
      if (membits[0x108] & MEMBITS_R)
171
          set_scorp_profrom(2);
172
      if (membits[0x10C] & MEMBITS_R)
173
          set_scorp_profrom(3);
174
   }
175
#endif
176
}
177
 
178
void z80loop()
179
{
180
   cpu.haltpos = 0;
181
 
182
   cpu.int_pend = true;
183
   // INT check separated from main Z80 loop to improve emulation speed
184
   while (cpu.t < conf.intlen)
185
   {
186
      if(conf.mem_model == MM_ATM3 && nmi_pending)
187
      {
188
          nmi_pending = 0;
189
          cpu.nmi_in_progress = true;
190
          set_banks();
191
          m_nmi(RM_NOCHANGE);
192
          continue;
193
      }
194
 
195
      if (cpu.int_pend && cpu.iff1 && cpu.t != cpu.eipos && // int enabled in CPU not issued after EI
196
           !((conf.mem_model == MM_ATM710 || conf.mem_model == MM_ATM3) && !(comp.pFF77 & 0x20))) // int enabled by ATM hardware
197
      {
198
         handle_int(&cpu, cpu.IntVec()); // ═рўрыю юсЁрсюЄъш int (чряшё№ т ёЄхъ рфЁхёр тючтЁрЄр ш Є.я.)
199
      }
200
#ifdef Z80_DBG
201
      debug_events(&cpu);
202
#endif
203
      step();
204
 
205
      if (!cpu.int_pend)
206
          break;
207
/*
208
      if (cpu.halted)
209
          break;
210
*/
211
   }
212
   cpu.int_pend = false;
796 DimkaM 213
   cpu.eipos = -1U;
716 lvd 214
 
215
   while (cpu.t < conf.frame)
216
   {
217
#ifdef Z80_DBG
218
      debug_events(&cpu);
219
#endif
220
/*
221
      if (cpu.halted)
222
      {
223
         //cpu.t += 4, cpu.r = (cpu.r & 0x80) + ((cpu.r+1) & 0x7F); continue;
224
         unsigned st = (conf.frame-cpu.t-1)/4+1;
225
         cpu.t += 4*st;
226
         cpu.r_low += st;
227
         break;
228
      }
229
*/
230
      step();
231
 
232
      if(comp.pBE)
233
      {
234
          if(comp.pBE == 1)
235
          {
236
              cpu.nmi_in_progress = false;
237
              set_banks();
238
          }
239
          comp.pBE--;
240
      }
241
 
242
      if(nmi_pending)
243
      {
244
         if((conf.mem_model == MM_PROFSCORP || conf.mem_model == MM_SCORP))
245
         {
246
             nmi_pending--;
247
             if(cpu.pc >= 0x4000)
248
             {
249
    //             printf("pc=%x\n", cpu.pc);
250
                 ::m_nmi(RM_DOS);
251
                 nmi_pending = 0;
252
             }
253
         }
254
      }
255
   }
256
}