Subversion Repositories pentevo

Rev

Rev 354 | Details | Compare with Previous | Last modification | View Log | RSS feed

Rev Author Line No. Line
334 lvd 1
`include "../include/tune.v"
333 lvd 2
 
334 lvd 3
// Pentevo project (c) NedoPC 2011
4
//
5
// fetches video data for renderer
6
 
7
module video_fetch(
8
 
9
        input  wire        clk, // 28 MHz clock
10
 
11
 
12
        input  wire        cend,     // general
13
        input  wire        pre_cend, //        synchronization
14
 
333 lvd 15
        input  wire        vpix, // vertical window
334 lvd 16
 
17
        input  wire        fetch_start, // fetching start and stop
18
        input  wire        fetch_end,   //
19
 
336 lvd 20
        output reg         fetch_sync,     // 1 cycle after cend
334 lvd 21
 
22
 
23
        input  wire [15:0] video_data,   // video data receiving from dram arbiter
24
        input  wire        video_strobe, //
25
        output reg         video_go, // indicates need for data
26
 
336 lvd 27
        output reg  [63:0] pic_bits // picture bits -- data for renderer
334 lvd 28
 
29
        // currently, video_fetch assigns that there are only 1/8 and 1/4
30
        // bandwidth. !!needs correction for higher bandwidths!!
31
 
32
 
33
);
34
        reg [3:0] fetch_sync_ctr; // generates fetch_sync to synchronize
35
                                  // fetch cycles (each 16 dram cycles long)
36
                                  // fetch_sync coincides with cend
37
 
38
        reg [1:0] fetch_ptr; // pointer to fill pic_bits buffer
39
        reg       fetch_ptr_clr; // clears fetch_ptr
40
 
41
 
42
        reg [15:0] fetch_data [0:3]; // stores data fetched from memory
43
 
44
        // fetch window
45
        always @(posedge clk)
46
                if( fetch_start && vpix )
47
                        video_go <= 1'b1;
48
                else if( fetch_end )
49
                        video_go <= 1'b0;
50
 
51
 
52
 
53
        // fetch sync counter
330 lvd 54
        always @(posedge clk) if( cend )
334 lvd 55
        begin
56
                if( fetch_start )
57
                        fetch_sync_ctr <= 0;
58
                else
59
                        fetch_sync_ctr <= fetch_sync_ctr + 1;
330 lvd 60
        end
334 lvd 61
 
62
 
63
        // fetch sync signal
64
        always @(posedge clk)
339 lvd 65
                if( (fetch_sync_ctr==1) && pre_cend )
334 lvd 66
                        fetch_sync <= 1'b1;
67
                else
68
                        fetch_sync <= 1'b0;
69
 
70
 
335 lvd 71
 
334 lvd 72
        // fetch_ptr clear signal
73
        always @(posedge clk)
74
                if( (fetch_sync_ctr==0) && pre_cend )
75
                        fetch_ptr_clr <= 1'b1;
76
                else
77
                        fetch_ptr_clr <= 1'b0;
78
 
79
 
80
        // buffer fill pointer
81
        always @(posedge clk)
82
                if( fetch_ptr_clr )
83
                        fetch_ptr <= 0;
84
                else if( video_strobe )
85
                        fetch_ptr <= fetch_ptr + 1;
86
 
87
 
88
 
89
        // store fetched data
90
        always @(posedge clk) if( video_strobe )
91
                fetch_data[fetch_ptr] <= video_data;
92
 
339 lvd 93
 
334 lvd 94
        // pass fetched data to renderer
336 lvd 95
        always @(posedge clk) if( fetch_sync )
334 lvd 96
        begin
97
                pic_bits[ 7:0 ] <= fetch_data[0][15:8 ];
98
                pic_bits[15:8 ] <= fetch_data[0][ 7:0 ];
99
                pic_bits[23:16] <= fetch_data[1][15:8 ];
100
                pic_bits[31:24] <= fetch_data[1][ 7:0 ];
101
                pic_bits[39:32] <= fetch_data[2][15:8 ];
102
                pic_bits[47:40] <= fetch_data[2][ 7:0 ];
103
                pic_bits[55:48] <= fetch_data[3][15:8 ];
104
                pic_bits[63:56] <= fetch_data[3][ 7:0 ];
105
        end
106
 
107
endmodule
108
 
109