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        // make filtered out vesions of read/write strobes
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        // make filtered out vesions of read/write strobes
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        always @(posedge fclk)
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        always @(posedge fclk)
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        begin
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        begin
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                wr_regs[2:0] <= { wr_regs[1:0], ~zwr_n };
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                wr_regs[2:0] <= { wr_regs[1:0], ~(zwr_n|ziorq_n) };
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                rd_regs[2:0] <= { rd_regs[1:0], ~zrd_n };
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                rd_regs[2:0] <= { rd_regs[1:0], ~(zrd_n|ziorq_n) };
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        end
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        end
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        //
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        //
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        assign wr_start = wr_regs[2:0]==3'b001 && !ctr_5;
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        assign wr_start = wr_regs[2:0]==3'b001 && !ctr_5;
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        assign rd_start = rd_regs[2:0]==3'b001 && !ctr_5;
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        assign rd_start = rd_regs[2:0]==3'b001 && !ctr_5;
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        always @*
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        always @*
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                async_sl811_a0 = ~za[15];
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                async_sl811_a0 = ~za[15];
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        // w5300 chip select
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        // w5300 chip select
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        assign mwr = !zmreq_n && !zwr_n && (za[15:14]==rommap_win) && rommap_ena;
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        assign mwr = 1'b0; // !zmreq_n && !zwr_n && (za[15:14]==rommap_win) && rommap_ena;
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        assign mrd = !zmreq_n && !zrd_n && !zcsrom_n && (za[15:14]==rommap_win) && rommap_ena;
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        assign mrd = 1'b0; // !zmreq_n && !zrd_n && !zcsrom_n && (za[15:14]==rommap_win) && rommap_ena;
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        //
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        //
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        always @*
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        always @*
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                async_w5300_cs_n = ~(mwr || mrd || ( w5300_ports && io_addr_ok && !za[15] && !ziorq_n ) );
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                async_w5300_cs_n = ~(mwr || mrd || ( w5300_ports && io_addr_ok && !za[15] && !ziorq_n ) );
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        // block ROM
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        // block ROM