Rev 668 | Show entire file | Regard whitespace | Details | Blame | Last modification | View Log | RSS feed
| Rev 668 | Rev 684 | ||
|---|---|---|---|
| Line 38... | Line 38... | ||
| 38 | input wire vsync, |
38 | input wire vsync, |
| 39 | 39 | ||
| 40 | input wire [ 3:0] pixels, |
40 | input wire [ 3:0] pixels, |
| 41 | input wire [ 3:0] border, |
41 | input wire [ 3:0] border, |
| 42 | 42 | ||
| - | 43 | input wire border_sync, |
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| - | 44 | input wire border_sync_ena, |
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| - | 45 | ||
| 43 | // ulaplus related |
46 | // ulaplus related |
| 44 | input wire [ 1:0] up_palsel, |
47 | input wire [ 1:0] up_palsel, |
| 45 | input wire [ 2:0] up_paper, |
48 | input wire [ 2:0] up_paper, |
| 46 | input wire [ 2:0] up_ink, |
49 | input wire [ 2:0] up_ink, |
| 47 | input wire up_pixel, |
50 | input wire up_pixel, |
| Line 63... | Line 66... | ||
| 63 | 66 | ||
| 64 | wire [ 3:0] zxcolor; |
67 | wire [ 3:0] zxcolor; |
| 65 | wire [ 5:0] up_color; |
68 | wire [ 5:0] up_color; |
| 66 | wire [ 8:0] palette_color; |
69 | wire [ 8:0] palette_color; |
| 67 | 70 | ||
| - | 71 | reg [3:0] synced_border; |
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| - | 72 | ||
| 68 | reg vsync_r; |
73 | reg vsync_r; |
| 69 | reg [1:0] ctr_14; |
74 | reg [1:0] ctr_14; |
| 70 | reg ctr_h; |
75 | reg ctr_h; |
| 71 | reg ctr_v; |
76 | reg ctr_v; |
| 72 | 77 | ||
| - | 78 | ||
| - | 79 | always @(posedge clk) |
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| - | 80 | if( border_sync ) |
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| - | 81 | synced_border <= border; |
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| - | 82 | ||
| 73 | assign zxcolor = (hpix&vpix) ? pixels : border; |
83 | assign zxcolor = (hpix&vpix) ? pixels : (border_sync_ena ? synced_border : border); |
| 74 | 84 | ||
| 75 | assign up_color = (hpix&vpix) ? {up_palsel,~up_pixel,up_pixel?up_ink:up_paper} : {3'd0,border[2:0]}; |
85 | assign up_color = (hpix&vpix) ? {up_palsel,~up_pixel,up_pixel?up_ink:up_paper} : {3'd0,border[2:0]}; |
| 76 | 86 | ||
| 77 | assign palette_color = up_ena ? {3'b100,up_color} : {5'd0,zxcolor}; |
87 | assign palette_color = up_ena ? {3'b100,up_color} : {5'd0,zxcolor}; |
| 78 | 88 | ||