Blame | Last modification | View Log | Download | RSS feed
ifndef __reg2323inc__reg2323inc equ 1savelisting off ; kein Listing ueber diesen File;****************************************************************************;* *;* AS 1.42 - File REG2323.INC *;* *;* Contains Bit & Register Definitions for AT90S2323/2343 *;* *;****************************************************************************;----------------------------------------------------------------------------; Memory LimitsE2END equ 127 ; End Address EEPROMRAMSTART equ 0x60,data ; Start Address SRAMRAMEND equ 0xdf,data ; End Address SRAMFLASHEND label 2047 ; End Address Flash;----------------------------------------------------------------------------; Chip ConfigurationMCUCR port 0x35 ; MCU General Control RegisterSM avrbit MCUCR,4 ; Choose Idle/Powerdown ModeSE avrbit MCUCR,5 ; Enable Sleep ModeMCUSR port 0x34 ; MCU Satus RegisterPORF avrbit MCUSR,0 ; Power-On Reset FlagEXTRF avrbit MCUSR,1 ; Externel Reset Flag;----------------------------------------------------------------------------; EEPROMinclude "ee90.inc"EEMWE avrbit EECR,2 ; Multiple Write Emable;----------------------------------------------------------------------------; GPIOPINB port 0x16 ; Port B @ 0x16 (IO) ff.__PORTB_BITS equ 0x1f ; (bits 0..4);----------------------------------------------------------------------------; Interrupt Vectorsenumconf 1,codeenum INT0_vect=1 ; External Interrupt Request 0nextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflow;----------------------------------------------------------------------------; External InterruptsISC00 avrbit MCUCR,0 ; External Interrupt 0 Sense ControlISC01 avrbit MCUCR,1GIMSK port 0x3b ; General Interrupt Mask RegisterINT0 avrbit GIMSK,6 ; Enable External Interrupt 0GIFR port 0x3a ; General Interrput Flag RegisterINTF0 avrbit GIFR,6;----------------------------------------------------------------------------; TimersTCCR0 port 0x33 ; Timer/Counter 0 Control RegisterCS00 avrbit TCCR0,0 ; Clock SelectCS01 avrbit TCCR0,1CS02 avrbit TCCR0,2TCNT0 port 0x32 ; Timer/Counter 0 ValueTIMSK port 0x39 ; Timer Interrupt Mask RegisterTOIE0 avrbit TIMSK,1 ; Timer/Counter 0 Overflow Interrupt EnableTIFR port 0x38 ; Timer Interrupt Status Register;----------------------------------------------------------------------------; Watchdog Timerinclude "wdm21.inc"WDTOE avrbit WDTCR,3 ; Watchdog Turn-Off Enablerestoreendif ; __reg2323inc