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  1.  
  2. #define BYTE unsigned char
  3. #define WORD unsigned short
  4. #define ISO_BIT     0x10
  5. #define MAX_EP          0x05     // maximum number of endpoints (Ep0 + max of 4 data endpoints)
  6.  
  7. //*****************************************************************************************
  8. // Constant Defines
  9. //*****************************************************************************************
  10.  
  11. #define TIMEOUT_RETRY           0x06    // Maximum no. of timeout retry during USB xfer
  12.  
  13. typedef struct
  14. {
  15.     WORD  wVID, wPID;       // Vendor ID and Product ID
  16.     BYTE  bClass;           //  
  17.     BYTE  bNumOfEPs;        // actual number endpoint from slave
  18.     BYTE  iMfg;                         // Manufacturer ID
  19.     BYTE  iPdt;                         // Product ID
  20.     BYTE  bId1;
  21.     BYTE  bId2;
  22.     BYTE  bEPAddr[MAX_EP];   // bit 7 = 1 = use PID_IN,  
  23.     BYTE  bAttr[MAX_EP];     // ISO | Bulk | Interrupt | Control
  24.     WORD  wPayLoad[MAX_EP];  // ISO range: 1-1023, Bulk: 1-64, etc
  25.     WORD  bInterval[MAX_EP]; // polling interval (for LS)
  26.     BYTE  bData1[MAX_EP];    // DataToggle value
  27. } pUSBDEV;
  28.  
  29. typedef struct
  30. {
  31.     BYTE bmRequest;
  32.     BYTE bRequest;
  33.     WORD wValue;
  34.     WORD wIndex;
  35.     WORD wLength;
  36. } SetupPKG;
  37.  
  38. typedef struct
  39. {
  40.     unsigned char usbaddr;
  41.     unsigned char endpoint;
  42.     unsigned char pid;
  43.     unsigned char wPayload;
  44.     unsigned int wLen;
  45.     unsigned char *buffer;       
  46.     SetupPKG setup;
  47.     unsigned char epbulkin;
  48.     unsigned char epbulkout;
  49.  
  50. } PKG;
  51.  
  52. //------------------------------------------------------------------------
  53. // EP0 use for configuration and Vendor Specific command interface
  54. //------------------------------------------------------------------------
  55. #define EP0_Buf             0x10        // define start of EP0 64-byte buffer
  56. #define EP1_Buf             0x40        // define start of EP1 64-byte buffer
  57.  
  58. /*-------------------------------------------------------------------------
  59.  * SL811H Register Control memory map
  60.  * --Note:  
  61.  *      --SL11H only has one control register set from 0x00-0x04
  62.  *      --SL811H has two control register set from 0x00-0x04 and 0x08-0x0c
  63.  *------------------------------------------------------------------------*/
  64.  
  65. #define EP0Control      0x00
  66. #define EP0Address      0x01
  67. #define EP0XferLen      0x02
  68. #define EP0Status       0x03
  69. #define EP0Counter      0x04
  70.  
  71. #define EP1Control      0x08
  72. #define EP1Address      0x09
  73. #define EP1XferLen      0x0a
  74. #define EP1Status       0x0b
  75. #define EP1Counter      0x0c
  76.  
  77. #define CtrlReg         0x05
  78. #define IntEna          0x06
  79.                                // 0x07 is reserved
  80. #define IntStatus       0x0d
  81. #define cDATASet        0x0e
  82. #define cSOFcnt         0x0f   // Master=1 Slave=0, D+/D-Pol Swap=1 0=not [0-5] SOF Count  
  83.                                // 0xAE = 1100 1110
  84.                                // 0xEE = 1110 1110
  85.  
  86. #define IntMask         0x57   /* Reset|DMA|EP0|EP2|EP1 for IntEna */
  87. #define HostMask        0x47   /* Host request command  for IntStatus */
  88. #define ReadMask        0xd7   /* Read mask interrupt   for IntStatus */
  89.  
  90. //Interrupt Status Mask
  91. #define USB_A_DONE              0x01
  92. #define USB_B_DONE              0x02
  93. #define BABBLE_DETECT           0x04
  94. #define INT_RESERVE             0x08
  95. #define SOF_TIMER               0x10
  96. #define INSERT_REMOVE           0x20
  97. #define USB_RESET               0x40
  98. #define USB_DPLUS               0x80
  99. #define INT_CLEAR               0xFF
  100.  
  101. //EP0 Status Mask
  102. #define EP0_ACK                 0x01    // EPxStatus bits mask during a read
  103. #define EP0_ERROR               0x02
  104. #define EP0_TIMEOUT             0x04
  105. #define EP0_SEQUENCE    0x08
  106. #define EP0_SETUP               0x10
  107. #define EP0_OVERFLOW    0x20
  108. #define EP0_NAK                 0x40
  109. #define EP0_STALL               0x80
  110.  
  111. /*-------------------------------------------------------------------------
  112.  * Standard Chapter 9 definition
  113.  *-------------------------------------------------------------------------
  114.  */
  115. #define GET_STATUS      0x00                                                                                                                               
  116. #define CLEAR_FEATURE   0x01
  117. #define SET_FEATURE     0x03
  118. #define SET_ADDRESS     0x05
  119. #define GET_DESCRIPTOR  0x06
  120. #define SET_DESCRIPTOR  0x07
  121. #define GET_CONFIG      0x08
  122. #define SET_CONFIG      0x09
  123. #define GET_INTERFACE   0x0a
  124. #define SET_INTERFACE   0x0b
  125. #define SYNCH_FRAME     0x0c
  126.  
  127.  
  128. #define DEVICE          0x01
  129. #define CONFIGURATION   0x02
  130. #define STRING          0x03
  131. #define INTERFACE       0x04
  132. #define ENDPOINT        0x05
  133.  
  134. #define STDCLASS        0x00
  135.  
  136. /*-------------------------------------------------------------------------
  137.  * SL11H/SL811H definition
  138.  *-------------------------------------------------------------------------
  139.  */
  140.  
  141.                            // USB-A, USB-B Host Control Register [00H, 08H]
  142.                            // Pre  Reserved
  143.                            //  DatT Dir [1=Trans, 0=Recv]
  144.                            //   SOF Enable
  145.                            //    ISO  Arm  
  146. #define DATA0_WR    0x07   // 0000 0111 (      Data0 +       OUT + Enable + Arm)
  147. #define sDATA0_WR   0x27   // 0010 0111 (      Data0 + SOF + OUT + Enable + Arm)
  148.  
  149. #define DATA0_RD    0x03   // 0000 0011 (      Data0 +       IN +  Enable + Arm)
  150. #define sDATA0_RD   0x23   // 0010 0011 (      Data0 + SOF + IN +  Enable + Arm)
  151.  
  152. #define PID_SETUP   0xD0  
  153. #define PID_IN      0x90
  154. #define PID_OUT     0x10
  155.  
  156.  
  157. unsigned char SL811_GetRev(void);
  158. void USBReset(void);
  159. unsigned char usbXfer(void);
  160. unsigned char ep0Xfer(void);
  161. unsigned char epBulkSend(unsigned char *pBuffer,unsigned int len);
  162. unsigned char epBulkRcv(unsigned char *pBuffer,unsigned int len);
  163. unsigned char SetAddress(unsigned char addr);
  164. unsigned char Set_Configuration(void);
  165.  
  166. unsigned char EnumUsbDev(BYTE usbaddr);
  167. void SL811_Init(void);
  168.  
  169. //void check_key_LED(void);
  170.