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  1. // ZX-Evo SDLoad Configuration (c) NedoPC 2023
  2. //
  3. // video sync module
  4.  
  5. /*
  6.     This file is part of ZX-Evo Base Configuration firmware.
  7.  
  8.     ZX-Evo Base Configuration firmware is free software:
  9.     you can redistribute it and/or modify it under the terms of
  10.     the GNU General Public License as published by
  11.     the Free Software Foundation, either version 3 of the License, or
  12.     (at your option) any later version.
  13.  
  14.     ZX-Evo Base Configuration firmware is distributed in the hope that
  15.     it will be useful, but WITHOUT ANY WARRANTY; without even
  16.     the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  17.     See the GNU General Public License for more details.
  18.  
  19.     You should have received a copy of the GNU General Public License
  20.     along with ZX-Evo Base Configuration firmware.
  21.     If not, see <http://www.gnu.org/licenses/>.
  22. */
  23.  
  24. module video_sync
  25. (
  26.         input  wire clk,
  27.         input  wire rst_n,
  28.  
  29.         input  wire vga_on,
  30.  
  31.  
  32. );
  33.  
  34.         parameter H_PERIOD = 9'd448; // in 7MHz clock
  35.         //
  36.         parameter H_TV_SYNC_END  = 9'd33; // counting starts with HSYNC going active
  37.         parameter H_TV_PIX_START = 9'd78;
  38.         parameter H_TV_PIX_END   = 9'd438;
  39.         //
  40.         parameter H_VGA_SYNC_END  = 9'd53;
  41.         parameter H_VGA_PIX_START = 9'd79;
  42.         parameter H_VGA_PIX_END   = 9'd439;
  43.  
  44.  
  45.         parameter V_PERIOD = 9'd262; // in 15625Hz clock
  46.         //
  47.         parameter V_SYNC_END  = 9'd2; // in TV mode, must be a little longer than exact 2 HSYNC periods. Addition is 78 7MHz clocks
  48.         parameter V_PIX_START = 9'd18;
  49.         parameter V_PIX_END   = 9'd258;
  50.  
  51.  
  52.         reg [1:0] pix_divider = 2'b0;
  53.         reg pix_stb;
  54.  
  55.  
  56.         reg [8:0] h_counter = 9'd0;
  57.  
  58.  
  59.         reg v_div2 = 1'b0;
  60.  
  61.         reg [8:0] v_counter = 9'd0;
  62.  
  63.  
  64.  
  65.         // pixel clock strobes
  66.         always @(posedge clk)
  67.                 pix_divider[1:0] <= { pix_divider[0], ~pix_divider[1] };
  68.         //
  69.         always @(posedge clk)
  70.                 pix_stb <= vga_on ? (~^pix_divider) : (&pix_divider);
  71.  
  72.  
  73.  
  74.         // horizontal counter: counts from 1 to 448
  75.         wire h_count_end = &h_counter[8:6]; // 448 is 0x1C0
  76.         //
  77.         always @(posedge clk)
  78.         if( pix_stb )
  79.         begin
  80.                 if( h_count_end )
  81.                         h_counter <= 9'd1;
  82.                 else
  83.                         h_counter <= h_counter + 9'd1;
  84.         end
  85.  
  86.         // hsync on/off
  87.         wire hsync_on  = h_count_end;
  88.         wire hsync_off = vga_on ? (h_counter==H_VGA_SYNC_END) : (h_counter==H_TV_SYNC_END);
  89.  
  90.         // hpix on/off
  91.         wire hpix_on  = vga_on ? (h_counter==H_VGA_PIX_START) : (h_counter==H_TV_PIX_START);
  92.         wire hpix_off = vga_on ? (h_counter==H_VGA_PIX_STOP) : (h_counter==H_TV_PIX_STOP);
  93.  
  94.  
  95.         // skip every second vertical count in vga mode
  96.         always @(posedge clk)
  97.         if( pix_stb && h_count_end )
  98.                 v_div2 <= vga_on ? (~v_div2) : 1'b1;
  99.  
  100.         // vertical count strobe
  101.         wire v_stb = pix_stb & h_count_end & v_div2;
  102.  
  103.         // vertical counter: from 1 to 262
  104.         wire v_count_end = v_counter[8] & (&v_counter[2:1]); // 262 is 0x106
  105.         //
  106.         always @(posedge clk)
  107.         if( v_stb )
  108.         begin
  109.                 if( v_count_end )
  110.                         v_counter <= 9'd1;
  111.                 else
  112.                         v_counter <= v_counter + 9'd1;
  113.         end
  114.  
  115.         // vsync on/off
  116.         wire vsync_on  = v_count_end;
  117.         wire vsync_off = (v_counter==V_SYNC_END);
  118.  
  119.         // vpix on/off
  120.         wire vpix_on  = (v_counter==V_PIX_START);
  121.         wire vpix_off = (v_counter==V_PIX_STOP);
  122.  
  123.  
  124.  
  125.  
  126.  
  127.  
  128. endmodule
  129.  
  130.