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ifndef __regm323inc__regm323inc equ 1savelisting off ; no listing over this file;****************************************************************************;* *;* AS 1.42 - File REGM323.INC *;* *;* Contains Bit & Register Definitions for ATmega323 *;* *;****************************************************************************;----------------------------------------------------------------------------; Memory LimitsE2END equ 1023RAMSTART equ 0x60,dataRAMEND equ 0x85f,dataFLASHEND label 0x7fff;----------------------------------------------------------------------------; Chip ConfigurationMCUCR port 0x35 ; MCU General Control RegisterSM0 avrbit MCUCR,4SM1 avrbit MCUCR,5SM2 avrbit MCUCR,6 ; Sleep Mode SelectSE avrbit MCUCR,7 ; Sleep EnableMCUCSR port 0x34 ; MCU Control and Status RegisterWDRF avrbit MCUCSR,3 ; Watchdog Reset OccuredBORF avrbit MCUCSR,2 ; Brown-Out Reset OccuredEXTRF avrbit MCUCSR,1 ; External Reset OccuredPORF avrbit MCUCSR,0 ; Power-On Reset OccuredOSCCAL port 0x04 ; Oscillator Calibration;----------------------------------------------------------------------------; EEPROM/Program Memory Accessinclude "eem.inc"SPMCR port 0x37 ; Store Program Memory Control RegisterASB avrbit SPMCR,6 ; Application Section BusyASRE avrbit SPMCR,4 ; Application Section Rd EnableBLBSET avrbit SPMCR,3 ; Boot Lock Bit SetPGWRT avrbit SPMCR,2 ; Page WritePGERS avrbit SPMCR,1 ; Page EraseSPMEN avrbit SPMCR,0 ; Store Program Eemory Enable;----------------------------------------------------------------------------; JTAGJTRF avrbit MCUCSR,4 ; JTAG Reset OccuredJTD avrbit MCUCSR,7 ; JTAG DisableOCDR port 0x31 ; On-Chip Debug Register;----------------------------------------------------------------------------; GPIOPINA port 0x19 ; Port A @ 0x19 (IO) ff.PINB port 0x16 ; Port B @ 0x16 (IO) ff.PINC port 0x13 ; Port C @ 0x13 (IO) ff.PIND port 0x10 ; Port D @ 0x10 (IO) ff.SFIOR port 0x30 ; Special Function I/O RegisterPUD avrbit SFIOR,2 ; Pull-Up Disable;----------------------------------------------------------------------------; Interrupt Vectorsenumconf 2,codeenum INT0_vect=2 ; External Interrupt Request 0nextenum INT1_vect ; External Interrupt Request 1nextenum INT2_vect ; External Interrupt Request 2nextenum TIMER2_COMP_vect ; Timer/Counter 2 Compare Matchnextenum TIMER2_OVF_vect ; Timer/Counter 2 Overflownextenum TIMER1_CAPT_vect ; Timer/Counter 1 Capturenextenum TIMER1_COMPA_vect ; Timer/Counter 1 Compare Match Anextenum TIMER1_COMPB_vect ; Timer/Counter 1 Compare Match Bnextenum TIMER1_OVF_vect ; Timer/Counter 1 Overflownextenum TIMER0_COMP_vect ; Timer/Counter 0 Compare Matchnextenum TIMER0_OVF_vect ; Timer/Counter 0 Overflownextenum SPI_STC_vect ; SPI Serial Transfer Completenextenum USART_RX_vectc ; USART Rx Completenextenum USART_UDRE_vect ; USART Data Register Emptynextenum USART_TX_vectc ; USART Tx Completenextenum ADC_vect ; ADC Conversion Completenextenum EE_RDY_vect ; EEPROM Readynextenum ANA_COMP_vect ; Analog Comparatornextenum TWI_vect ; 2-Wire Serial Interfacenextenum SPM_RDY_vect ; Store Program Memory Ready;----------------------------------------------------------------------------; External Interrupts; bits in MCUCRISC00 avrbit MCUCR,0 ; External Interrupt 0 Sense ControlISC01 avrbit MCUCR,1ISC10 avrbit MCUCR,2 ; External Interrupt 1 Sense ControlISC11 avrbit MCUCR,3; bits in MCUCSRISC2 avrbit MCUCSR,6 ; External Interrupt 2 Sense ControlGICR port 0x3b ; General Interrupt Control RegisterIVCE avrbit GICR,0 ; Interrupt Vector Change EnableIVSEL avrbit GICR,1 ; Interrupt Vector SelectINT2 avrbit GICR,5 ; Enable External Interrupt 2INT0 avrbit GICR,6 ; Enable External Interrupt 0INT1 avrbit GICR,7 ; Enable External Interrupt 1GIFR port 0x3a ; External Interrupt-FlagsINTF2 avrbit GIFR,5 ; External Interrupt 2 OccuredINTF0 avrbit GIFR,6 ; External Interrupt 0 OccuredINTF1 avrbit GIFR,7 ; External Interrupt 1 Occured;----------------------------------------------------------------------------; TimersPSR10 avrbit SFIOR,0 ; Prescaler Reset T0/1PSR2 avrbit SFIOR,1 ; ditto T2TCCR0 port 0x33 ; Timer/Counter 0 Control RegisterCS00 avrbit TCCR0,0 ; Timer/Counter 0 Clock SelectCS01 avrbit TCCR0,1CS02 avrbit TCCR0,2CTC0 avrbit TCCR0,3 ; Timer/Counter 0 Clear on MatchCOM00 avrbit TCCR0,4 ; Timer/Counter 0 Compare ModeCOM01 avrbit TCCR0,5PWM0 avrbit TCCR0,6 ; Timer/Counter 0 PWM ModeFOC0 avrbit TCCR0,7 ; Timer/Counter 0 Force Output CompareTCNT0 port 0x32 ; Timer/Counter 0 ValueOCR0 port 0x3c ; Timer/Counter 0 Output Compare ValueTCCR1A port 0x2f ; Timer/Counter 1 Control Register APWM10 avrbit TCCR1A,0 ; Timer/Counter 1 PWM ConfigPWM11 avrbit TCCR1A,1FOC1B avrbit TCCR1A,2 ; Timer/Counter 1 Force Output Compare BFOC1A avrbit TCCR1A,3 ; Timer/Counter 1 Force Output Compare ACOM1B0 avrbit TCCR1A,4 ; Timer/Counter 1 Compare Mode BCOM1B1 avrbit TCCR1A,5COM1A0 avrbit TCCR1A,6 ; Timer/Counter 1 Compare Mode ACOM1A1 avrbit TCCR1A,7TCCR1B port 0x2e ; Timer/Counter 1 Control Register BCS10 avrbit TCCR1B,0 ; Timer/Counter 1 Prescaler SettingCS11 avrbit TCCR1B,1CS12 avrbit TCCR1B,2CTC1 avrbit TCCR1B,3 ; Timer/Counter 1 Clear on MatchICES1 avrbit TCCR1B,6 ; Timer/Counter 1 Capture Slope SelectionICNC1 avrbit TCCR1B,7 ; Timer/Counter 1 Capture Noise FilterTCNT1L port 0x2c ; Timer/Counter 1 Value LSBTCNT1H port 0x2d ; Timer/Counter 1 Value MSBOCR1AL port 0x2a ; Timer/Counter 1 Output Compare Value A LSBOCR1AH port 0x2b ; Timer/Counter 1 Output Compare Value A MSBOCR1BL port 0x28 ; Timer/Counter 1 Output Compare Value B LSBOCR1BH port 0x29 ; Timer/Counter 1 Output Compare Value B MSBICR1L port 0x26 ; Timer/Counter 1 Input Capture Value LSBICR1H port 0x27 ; Timer/Counter 1 Input Capture Value MSBTCCR2 port 0x25 ; Timer/Counter 2 Control RegisterCS20 avrbit TCCR2,0 ; Timer/Counter 2 Prescaler SettingCS21 avrbit TCCR2,1CS22 avrbit TCCR2,2CTC2 avrbit TCCR2,3 ; Timer/Counter 2 Clear on MatchCOM20 avrbit TCCR2,4 ; Timer/Counter 2 Compare ModeCOM21 avrbit TCCR2,5PWM2 avrbit TCCR2,6 ; Timer/Counter 2 PWM ConfigFOC2 avrbit TCCR2,7 ; Timer/Counter 2 Force Output CompareTCNT2 port 0x24 ; Timer/Counter 2 ValueOCR2 port 0x23 ; Timer/Counter 2 Output Compare ValueTIMSK port 0x39 ; Timer Interrupt Mask RegisterTOIE0 avrbit TIMSK,0 ; Timer/Counter 0 Overflow Interrupt EnableOCIE0 avrbit TIMSK,1 ; Timer/Counter 0 Output Compare Interrupt EnableTOIE1 avrbit TIMSK,2 ; Timer/Counter 1 Overflow Interrupt EnableOCIE1B avrbit TIMSK,3 ; Timer/Counter 1 Output Compare Interrupt Enable BOCIE1A avrbit TIMSK,4 ; Timer/Counter 1 Output Compare Interrupt Enable ATICIE1 avrbit TIMSK,5 ; Timer/Counter 1 Input Capture Interrupt EnableTOIE2 avrbit TIMSK,6 ; Timer/Counter 2 Overflow Interrupt EnableOCIE2 avrbit TIMSK,7 ; Timer/Counter 2 Output Compare Interrupt EnableTIFR port 0x38 ; Timer Interrupt Flag RegisterASSR port 0x22 ; Asynchronous Status RegisterTCR2UB avrbit TIFR,0 ; Timer/Counter Control Register 2 Update BusyOCR2UB avrbit TIFR,1 ; Output Compare Register 2TCN2UB avrbit TIFR,2 ; Timer/Counter 2 Update BusyAS2 avrbit TIFR,3 ; Asynchronous Timer/Counter 2;----------------------------------------------------------------------------; Watchdog Timerinclude "wdm21.inc"WDTOE avrbit WDTCR,4 ; Turn-Off Enable;----------------------------------------------------------------------------; USARTinclude "usartm.inc";----------------------------------------------------------------------------; SPIinclude "spim.inc";----------------------------------------------------------------------------; TWIinclude "twim.inc";----------------------------------------------------------------------------; Analog Comparatorinclude "acm.inc";----------------------------------------------------------------------------; A/D Converterinclude "adcm8.inc"restore ; re-enable listingendif ; __regm323inc