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ifndef __regavrinc ; avoid multiple inclusion__regavrinc equ 1savelisting off ; kein Listing ueber diesen File;****************************************************************************;* *;* AS 1.42 - File REGAVR.INC *;* *;* Sinn : contains SFR and Bit Definitionen for AVR Processors *;* *;****************************************************************************;----------------------------------------------------------------------------; Bits with the name as given in the datasheets contain the plain bit; position within the register; with the prefix _bit_..., they hold; register and bit positionavrbit macro {intlabel},reg,pos__label__ equ posifndef _NO_AVR_BITSYMBOLS_bit___label__ bit reg.posendifendm;----------------------------------------------------------------------------; include proper CPU-specific register definitionsswitch MOMCPUNAMEcase "AT90S1200"include "avr/reg1200.inc"case "AT90S2313"include "avr/reg2313.inc"case "AT90S2323","AT90S2343"include "avr/reg2323.inc"case "AT90S2333"include "avr/reg2333.inc"case "AT90S4414"include "avr/reg4414.inc"case "AT90S4433"include "avr/reg4433.inc"case "AT90S4434"include "avr/reg4434.inc"case "AT90S8515"include "avr/reg8515.inc"case "AT90C8534"include "avr/reg8534.inc"case "AT90S8535"include "avr/reg8535.inc"case "AT43USB355"include "avr/regu355.inc"case "AT90USB646"include "avr/regu646.inc"case "AT90USB647"include "avr/regu647.inc"case "AT90USB1286"include "avr/regu1286.inc"case "AT90USB1287"include "avr/regu1287.inc"case "ATTINY13"include "avr/regtn13.inc"case "ATTINY13A"include "avr/regtn13a.inc"case "ATTINY26"include "avr/regtn26.inc"case "ATTINY2313","ATTINY2313A"include "avr/regt2313.inc"case "ATTINY4313"include "avr/regt4313.inc"case "ATTINY24","ATTINY24A"include "avr/regtn24.inc"case "ATTINY44","ATTINY44A"include "avr/regtn44.inc"case "ATTINY84","ATTINY84A"include "avr/regtn84.inc"case "ATTINY25"include "avr/regtn25.inc"case "ATTINY45"include "avr/regtn45.inc"case "ATTINY85"include "avr/regtn85.inc"case "ATTINY261","ATTINY261A"include "avr/regtn261.inc"case "ATTINY461","ATTINY461A"include "avr/regtn461.inc"case "ATTINY861","ATTINY861A"include "avr/regtn861.inc"case "ATTINY48"include "avr/regtn48.inc"case "ATTINY88"include "avr/regtn88.inc"case "ATTINY43U"include "avr/regtn43u.inc"case "ATTINY441"include "avr/regtn441.inc"case "ATTINY841"include "avr/regtn841.inc"case "ATTINY828"include "avr/regtn828.inc"case "ATTINY1634"include "avr/regtn1634.inc"case "ATTINY87"include "avr/regtn87.inc"case "ATTINY167"include "avr/regtn167.inc"case "ATTINY4"include "avr/regtn4.inc"case "ATTINY5"include "avr/regtn5.inc"case "ATTINY9"include "avr/regtn9.inc"case "ATTINY10"include "avr/regtn10.inc"case "ATTINY20"include "avr/regtn20.inc"case "ATTINY40"include "avr/regtn40.inc"case "ATTINY102"include "avr/regtn102.inc"case "ATTINY104"include "avr/regtn104.inc"case "ATTINY28"include "avr/regtn28.inc"case "ATTINY11"include "avr/regtn11.inc"case "ATTINY12"include "avr/regtn12.inc"case "ATTINY15"include "avr/regtn15.inc"case "ATMEGA48"include "avr/regm48.inc"case "ATMEGA8"include "avr/regm8.inc"case "ATMEGA8515"include "avr/regm8515.inc"case "ATMEGA8535"include "avr/regm8535.inc"case "ATMEGA88"include "avr/regm88.inc"case "ATMEGA8U2"include "avr/regm8u2.inc"case "ATMEGA16"include "avr/regm16.inc"case "ATMEGA161"include "avr/regm161.inc"case "ATMEGA162"include "avr/regm162.inc"case "ATMEGA163"include "avr/regm163.inc"case "ATMEGA164"include "avr/regm164.inc"case "ATMEGA165"include "avr/regm165.inc"case "ATMEGA168"include "avr/regm168.inc"case "ATMEGA169"include "avr/regm169.inc"case "ATMEGA16U2"include "avr/regm16u2.inc"case "ATMEGA16U4"include "avr/regm16u4.inc"case "ATMEGA32"include "avr/regm32.inc"case "ATMEGA323"include "avr/regm323.inc"case "ATMEGA324"include "avr/regm324.inc"case "ATMEGA325"include "avr/regm325.inc"case "ATMEGA3250"include "avr/regm3250.inc"case "ATMEGA328"include "avr/regm328.inc"case "ATMEGA329"include "avr/regm329.inc"case "ATMEGA3290"include "avr/regm3290.inc"case "ATMEGA32U2"include "avr/regm32u2.inc"case "ATMEGA32U4"include "avr/regm32u4.inc"case "ATMEGA32U6"include "avr/regm32u6.inc"case "ATMEGA406"include "avr/regm406.inc"case "ATMEGA64"include "avr/regm64.inc"case "ATMEGA640"include "avr/regm640.inc"case "ATMEGA644"include "avr/regm644.inc"case "ATMEGA644RFR2"include "avr/regm644rfr2.inc"case "ATMEGA645"include "avr/regm645.inc"case "ATMEGA6450"include "avr/regm6450.inc"case "ATMEGA649"include "avr/regm649.inc"case "ATMEGA6490"include "avr/regm6490.inc"case "ATMEGA103"include "avr/regm103.inc"case "ATMEGA128"include "avr/regm128.inc"case "ATMEGA1280"include "avr/regm1280.inc"case "ATMEGA1281"include "avr/regm1281.inc"case "ATMEGA1284"include "avr/regm1284.inc"case "ATMEGA1284RFR2"include "avr/reg1284rfr2.inc"case "ATMEGA2560"include "avr/regm2560.inc"case "ATMEGA2561"include "avr/regm2561.inc"case "ATMEGA2564RFR2"include "avr/reg2564rfr2.inc"elsecaseerror "wrong processor type set: only AT90S1200, AT90S2313, AT90S4414, AT90S4433, AT90S4434, AT90S8515, AT90C8534, AT90S8535,"error "AT90USB646, AT90USB647, AT90USB1286, AT90USB1287, AT90USB355,"error "ATTINY13(A), ATTINY26, ATTINY2313(A), ATTINY4313, ATTINY24(A), ATTINY44(A), ATTINY84(A), ATTINY25, ATTINY45, ATTINY85,"error "ATTINY261(A), ATTINY461(A), ATTINY861(A), ATTINY48, ATTINY88, ATTINY43U, ATTINY441, ATTINY841, ATTINY828, ATTINY1634,"error "ATTINY87, ATTINY167, ATTINY4, ATTINY5, ATTINY9, ATTINY10, ATTINY20, ATTINY40, ATTINY102, ATTINY104, ATTINY28,"error "ATTINY11, ATTINY12, ATTINY15,"error "ATMEGA48, ATMEGA8, ATMEGA8515, ATMEGA8535, ATMEGA88, ATMEGA8U2, ATMEGA16U2, ATMEGA16U4, ATMEGA32U2, ATMEGA32U4, ATMEGA32U6,"error "ATMEGA16, ATMEGA161, ATMEGA162, ATMEGA164, ATMEGA165, ATMEGA168, ATMEGA169, ATMEGA32, ATMEGA323, ATMEGA324, ATMEGA325, ATMEGA3250, ATMEGA328, ATMEGA329, ATMEGA3290,"error "ATMEGA406, ATMEGA64, ATMEGA640, ATMEGA644, ATMEGA644RFR2, ATMEGA645, ATMEGA6450, ATMEGA649, ATMEGA6490, ATMEGA103, ATMEGA128, ATMEGA1280, ATMEGA1281, ATMEGA1284, ATMEGA1284RFR2,"fatal "ATMEGA2560, ATMEGA2561 or ATMEGA2564RFR2 allowed!"endcaseif MOMPASS=1message "Atmel-AVR-SFR-Definitionen (C) 2017 Alfred Arnold"endif;----------------------------------------------------------------------------; Helper Macrosdefreg macro newreg,refreg,offsetswitch symtype(refreg)case 7newreg port refreg+offsetcase 2newreg sfr refreg+offsetendcaseendm; TODO: How to rework this to AVRBIT?__deducebit macro dest,srcifdef srcdest equ srcendifendm;----------------------------------------------------------------------------; Constant Memory AddressesE2START equ 0 ; start address internal EEPROMFLASHSTART label 0 ; start address internal Flash;----------------------------------------------------------------------------; Constant VectorsRESET_vect label 0 ; Reset Entry;----------------------------------------------------------------------------; CPU CoreSREG port 0x3f ; Statusregister:C avrbit SREG,0 ; CarryZ avrbit SREG,1 ; Ergebnis NullN avrbit SREG,2 ; Ergebnis negativV avrbit SREG,3 ; Zweierkomplement-UeberlaufS avrbit SREG,4 ; VorzeichenH avrbit SREG,5 ; HalfcarryT avrbit SREG,6 ; BitspeicherI avrbit SREG,7 ; globale Interruptsperre; size of stack pointer depends on size of internal data space; (if present at all)if RAMEND>=RAMSTARTSPL port 0x3d ; Stapelzeiger (LSB)if RAMEND>=256SPH port 0x3e ; (MSB)endifendifif FLASHEND>=65536RAMPZ port 0x3bRAMPZ0 avrbit RAMPZ,0endifif FLASHEND>=131072EIND port 0x3cEIND0 equ 0RAMPZ1 avrbit RAMPZ,1endif;----------------------------------------------------------------------------; Deduce remaining GPIO registersifndef __PORTPREFIX__PORTPREFIX equ "P"endififdef PINAifndef __PORTA_BITS__PORTA_BITS equ 0xffendifif __PORTA_BITS & 1PINA0 avrbit PINA,0endifif __PORTA_BITS & 2PINA1 avrbit PINA,1endifif __PORTA_BITS & 4PINA2 avrbit PINA,2endifif __PORTA_BITS & 8PINA3 avrbit PINA,3endifif __PORTA_BITS & 16PINA4 avrbit PINA,4endifif __PORTA_BITS & 32PINA5 avrbit PINA,5endifif __PORTA_BITS & 64PINA6 avrbit PINA,6endifif __PORTA_BITS & 128PINA7 avrbit PINA,7endififndef PACRdefreg DDRA,PINA,1if __PORTA_BITS & 1DDA0 avrbit DDRA,0endifif __PORTA_BITS & 2DDA1 avrbit DDRA,1endifif __PORTA_BITS & 4DDA2 avrbit DDRA,2endifif __PORTA_BITS & 8DDA3 avrbit DDRA,3endifif __PORTA_BITS & 16DDA4 avrbit DDRA,4endifif __PORTA_BITS & 32DDA5 avrbit DDRA,5endifif __PORTA_BITS & 64DDA6 avrbit DDRA,6endifif __PORTA_BITS & 128DDA7 avrbit DDRA,7endifendifdefreg PORTA,PINA,2if __PORTA_BITS & 1{__PORTPREFIX}A0 avrbit PORTA,0endifif __PORTA_BITS & 2{__PORTPREFIX}A1 avrbit PORTA,1endifif __PORTA_BITS & 4{__PORTPREFIX}A2 avrbit PORTA,2endifif __PORTA_BITS & 8{__PORTPREFIX}A3 avrbit PORTA,3endifif __PORTA_BITS & 16{__PORTPREFIX}A4 avrbit PORTA,4endifif __PORTA_BITS & 32{__PORTPREFIX}A5 avrbit PORTA,5endifif __PORTA_BITS & 64{__PORTPREFIX}A6 avrbit PORTA,6endifif __PORTA_BITS & 128{__PORTPREFIX}A7 avrbit PORTA,7endifendififdef PINBifndef __PORTB_BITS__PORTB_BITS equ 0xffendifif __PORTB_BITS & 1PINB0 avrbit PINB,0endifif __PORTB_BITS & 2PINB1 avrbit PINB,1endifif __PORTB_BITS & 4PINB2 avrbit PINB,2endifif __PORTB_BITS & 8PINB3 avrbit PINB,3endifif __PORTB_BITS & 16PINB4 avrbit PINB,4endifif __PORTB_BITS & 32PINB5 avrbit PINB,5endifif __PORTB_BITS & 64PINB6 avrbit PINB,6endifif __PORTB_BITS & 128PINB7 avrbit PINB,7endififndef PINB_inponlydefreg DDRB,PINB,1defreg PORTB,PINB,2if __PORTB_BITS & 1DDB0 avrbit DDRB,0{__PORTPREFIX}B0 avrbit PORTB,0endifif __PORTB_BITS & 2DDB1 avrbit DDRB,1{__PORTPREFIX}B1 avrbit PORTB,1endifif __PORTB_BITS & 4DDB2 avrbit DDRB,2{__PORTPREFIX}B2 avrbit PORTB,2endifif __PORTB_BITS & 8DDB3 avrbit DDRB,3{__PORTPREFIX}B3 avrbit PORTB,3endifif __PORTB_BITS & 16DDB4 avrbit DDRB,4{__PORTPREFIX}B4 avrbit PORTB,4endifif __PORTB_BITS & 32DDB5 avrbit DDRB,5{__PORTPREFIX}B5 avrbit PORTB,5endifif __PORTB_BITS & 64DDB6 avrbit DDRB,6{__PORTPREFIX}B6 avrbit PORTB,6endifif __PORTB_BITS & 128DDB7 avrbit DDRB,7{__PORTPREFIX}B7 avrbit PORTB,7endifendifendififdef PINCifndef __PORTC_BITS__PORTC_BITS equ 0xffendifdefreg DDRC,PINC,1defreg PORTC,PINC,2if __PORTC_BITS&1PINC0 avrbit PINC,0DDC0 avrbit DDRC,0{__PORTPREFIX}C0 avrbit PORTC,0endifif __PORTC_BITS&2PINC1 avrbit PINC,1DDC1 avrbit DDRC,1{__PORTPREFIX}C1 avrbit PORTC,1endifif __PORTC_BITS&4PINC2 avrbit PINC,2DDC2 avrbit DDRC,2{__PORTPREFIX}C2 avrbit PORTC,2endifif __PORTC_BITS&8PINC3 avrbit PINC,3DDC3 avrbit DDRC,3{__PORTPREFIX}C3 avrbit PORTC,3endifif __PORTC_BITS&16PINC4 avrbit PINC,4DDC4 avrbit DDRC,4{__PORTPREFIX}C4 avrbit PORTC,4endifif __PORTC_BITS&32PINC5 avrbit PINC,5DDC5 avrbit DDRC,5{__PORTPREFIX}C5 avrbit PORTC,5endifif __PORTC_BITS&64PINC6 avrbit PINC,6DDC6 avrbit DDRC,6{__PORTPREFIX}C6 avrbit PORTC,6endifif __PORTC_BITS&128PINC7 avrbit PINC,7DDC7 avrbit DDRC,7{__PORTPREFIX}C7 avrbit PORTC,7endifendififdef PINDifndef __PORTD_BITS__PORTD_BITS equ 0xffendifdefreg DDRD,PIND,1defreg PORTD,PIND,2if __PORTD_BITS & 1PIND0 avrbit PIND,0DDD0 avrbit DDRD,0{__PORTPREFIX}D0 avrbit PORTD,0endifif __PORTD_BITS & 3PIND1 avrbit PIND,1DDD1 avrbit DDRD,1{__PORTPREFIX}D1 avrbit PORTD,1endifif __PORTD_BITS & 4PIND2 avrbit PIND,2DDD2 avrbit DDRD,2{__PORTPREFIX}D2 avrbit PORTD,2endifif __PORTD_BITS & 8PIND3 avrbit PIND,3DDD3 avrbit DDRD,3{__PORTPREFIX}D3 avrbit PORTD,3endifif __PORTD_BITS & 16PIND4 avrbit PIND,4DDD4 avrbit DDRD,4{__PORTPREFIX}D4 avrbit PORTD,4endifif __PORTD_BITS & 32PIND5 avrbit PIND,5DDD5 avrbit DDRD,5{__PORTPREFIX}D5 avrbit PORTD,5endifif __PORTD_BITS & 64PIND6 avrbit PIND,6DDD6 avrbit DDRD,6{__PORTPREFIX}D6 avrbit PORTD,6endifif __PORTD_BITS & 128PIND7 avrbit PIND,7DDD7 avrbit DDRD,7{__PORTPREFIX}D7 avrbit PORTD,7endifendififdef PINEifndef __PORTE_BITS__PORTE_BITS equ 0xffendifdefreg DDRE,PINE,1defreg PORTE,PINE,2if __PORTE_BITS&1PINE0 avrbit PINE,0DDE0 avrbit DDRE,0{__PORTPREFIX}E0 avrbit PORTE,0endifif __PORTE_BITS&2PINE1 avrbit PINE,1DDE1 avrbit DDRE,1{__PORTPREFIX}E1 avrbit PORTE,1endifif __PORTE_BITS&4PINE2 avrbit PINE,2DDE2 avrbit DDRE,2{__PORTPREFIX}E2 avrbit PORTE,2endifif __PORTE_BITS&8PINE3 avrbit PINE,3DDE3 avrbit DDRE,3{__PORTPREFIX}E3 avrbit PORTE,3endifif __PORTE_BITS&16PINE4 avrbit PINE,4DDE4 avrbit DDRE,4{__PORTPREFIX}E4 avrbit PORTE,4endifif __PORTE_BITS&32PINE5 avrbit PINE,5DDE5 avrbit DDRE,5{__PORTPREFIX}E5 avrbit PORTE,5endifif __PORTE_BITS&64PINE6 avrbit PINE,6DDE6 avrbit DDRE,6{__PORTPREFIX}E6 avrbit PORTE,6endifif __PORTE_BITS&128PINF7 avrbit PINE,7DDE7 avrbit DDRE,7{__PORTPREFIX}E7 avrbit PORTE,7endifendififdef PINFifndef __PORTF_BITS__PORTF_BITS equ 0xffendififndef PINF_inponlyifndef DDRFdefreg DDRF,PINF,1endififndef PORTFdefreg PORTF,PINF,2endifif __PORTF_BITS&1DDF0 avrbit DDRF,0{__PORTPREFIX}F0 avrbit PORTF,0endifif __PORTF_BITS&2DDF1 avrbit DDRF,1{__PORTPREFIX}F1 avrbit PORTF,1endifif __PORTF_BITS&4DDF2 avrbit DDRF,2{__PORTPREFIX}F2 avrbit PORTF,2endifif __PORTF_BITS&8DDF3 avrbit DDRF,3{__PORTPREFIX}F3 avrbit PORTF,3endifif __PORTF_BITS&16DDF4 avrbit DDRF,4{__PORTPREFIX}F4 avrbit PORTF,4endifif __PORTF_BITS&32DDF5 avrbit DDRF,5{__PORTPREFIX}F5 avrbit PORTF,5endifif __PORTF_BITS&64DDF6 avrbit DDRF,6{__PORTPREFIX}F6 avrbit PORTF,6endifif __PORTF_BITS&128DDF7 avrbit DDRF,7{__PORTPREFIX}F7 avrbit PORTF,7endifPINF_inponly equ 0endifendififdef PINGifndef __PORTG_BITS__PORTG_BITS equ 0xffendifdefreg DDRG,PING,1DDG0 avrbit DDRG,0DDG1 avrbit DDRG,1DDG2 avrbit DDRG,2DDG3 avrbit DDRG,3DDG4 avrbit DDRG,4DDG5 avrbit DDRG,5DDG6 avrbit DDRG,6DDG7 avrbit DDRG,7defreg PORTG,PING,2{__PORTPREFIX}G0 avrbit PORTG,0{__PORTPREFIX}G1 avrbit PORTG,1{__PORTPREFIX}G2 avrbit PORTG,2{__PORTPREFIX}G3 avrbit PORTG,3{__PORTPREFIX}G4 avrbit PORTG,4{__PORTPREFIX}G5 avrbit PORTG,5{__PORTPREFIX}G6 avrbit PORTG,6{__PORTPREFIX}G7 avrbit PORTG,7endififdef PINHifndef __PORTH_BITS__PORTH_BITS equ 0xffendifdefreg DDRH,PINH,1DDH0 avrbit DDRH,0DDH1 avrbit DDRH,1DDH2 avrbit DDRH,2DDH3 avrbit DDRH,3DDH4 avrbit DDRH,4DDH5 avrbit DDRH,5DDH6 avrbit DDRH,6DDH7 avrbit DDRH,7defreg PORTH,PINH,2{__PORTPREFIX}H0 avrbit PORTH,0{__PORTPREFIX}H1 avrbit PORTH,1{__PORTPREFIX}H2 avrbit PORTH,2{__PORTPREFIX}H3 avrbit PORTH,3{__PORTPREFIX}H4 avrbit PORTH,4{__PORTPREFIX}H5 avrbit PORTH,5{__PORTPREFIX}H6 avrbit PORTH,6{__PORTPREFIX}H7 avrbit PORTH,7endififdef PINJifndef __PORTJ_BITS__PORTJ_BITS equ 0xffendifdefreg DDRJ,PINJ,1DDJ0 avrbit DDRJ,0DDJ1 avrbit DDRJ,1DDJ2 avrbit DDRJ,2DDJ3 avrbit DDRJ,3DDJ4 avrbit DDRJ,4DDJ5 avrbit DDRJ,5DDJ6 avrbit DDRJ,6DDJ7 avrbit DDRJ,7defreg PORTJ,PINJ,2{__PORTPREFIX}J0 avrbit PORTJ,0{__PORTPREFIX}J1 avrbit PORTJ,1{__PORTPREFIX}J2 avrbit PORTJ,2{__PORTPREFIX}J3 avrbit PORTJ,3{__PORTPREFIX}J4 avrbit PORTJ,4{__PORTPREFIX}J5 avrbit PORTJ,5{__PORTPREFIX}J6 avrbit PORTJ,6{__PORTPREFIX}J7 avrbit PORTJ,7endififdef PINKifndef __PORTK_BITS__PORTK_BITS equ 0xffendifdefreg DDRK,PINK,1DDK0 avrbit DDRK,0DDK1 avrbit DDRK,1DDK2 avrbit DDRK,2DDK3 avrbit DDRK,3DDK4 avrbit DDRK,4DDK5 avrbit DDRK,5DDK6 avrbit DDRK,6DDK7 avrbit DDRK,7defreg PORTK,PINK,2{__PORTPREFIX}K0 avrbit PORTK,0{__PORTPREFIX}K1 avrbit PORTK,1{__PORTPREFIX}K2 avrbit PORTK,2{__PORTPREFIX}K3 avrbit PORTK,3{__PORTPREFIX}K4 avrbit PORTK,4{__PORTPREFIX}K5 avrbit PORTK,5{__PORTPREFIX}K6 avrbit PORTK,6{__PORTPREFIX}K7 avrbit PORTK,7endififdef PINLdefreg DDRL,PINL,1DDL0 avrbit DDRL,0DDL1 avrbit DDRL,1DDL2 avrbit DDRL,2DDL3 avrbit DDRL,3DDL4 avrbit DDRL,4DDL5 avrbit DDRL,5DDL6 avrbit DDRL,6DDL7 avrbit DDRL,7defreg PORTL,PINL,2{__PORTPREFIX}L0 avrbit PORTL,0{__PORTPREFIX}L1 avrbit PORTL,1{__PORTPREFIX}L2 avrbit PORTL,2{__PORTPREFIX}L3 avrbit PORTL,3{__PORTPREFIX}L4 avrbit PORTL,4{__PORTPREFIX}L5 avrbit PORTL,5{__PORTPREFIX}L6 avrbit PORTL,6{__PORTPREFIX}L7 avrbit PORTL,7endififdef PCMSK0ifndef PCINT0PCINT0 avrbit PCMSK0,0PCINT1 avrbit PCMSK0,1PCINT2 avrbit PCMSK0,2PCINT3 avrbit PCMSK0,3PCINT4 avrbit PCMSK0,4PCINT5 avrbit PCMSK0,5PCINT6 avrbit PCMSK0,6PCINT7 avrbit PCMSK0,7endifendififdef PCMSK1ifndef PCINT8PCINT8 avrbit PCMSK1,0PCINT9 avrbit PCMSK1,1PCINT10 avrbit PCMSK1,2PCINT11 avrbit PCMSK1,3PCINT12 avrbit PCMSK1,4PCINT13 avrbit PCMSK1,5PCINT14 avrbit PCMSK1,6PCINT15 avrbit PCMSK1,7endifendififdef PCMSK2ifndef PCINT16PCINT16 avrbit PCMSK2,0PCINT17 avrbit PCMSK2,1PCINT18 avrbit PCMSK2,2PCINT19 avrbit PCMSK2,3PCINT20 avrbit PCMSK2,4PCINT21 avrbit PCMSK2,5PCINT22 avrbit PCMSK2,6PCINT23 avrbit PCMSK2,7endifendififdef PCMSK3ifndef PCINT16PCINT24 avrbit PCMSK3,0PCINT25 avrbit PCMSK3,1PCINT26 avrbit PCMSK3,2PCINT27 avrbit PCMSK3,3PCINT28 avrbit PCMSK3,4PCINT29 avrbit PCMSK3,5PCINT30 avrbit PCMSK3,6PCINT31 avrbit PCMSK3,7endifendififdef PCICRifdef PCMSK0PCIE0 avrbit PCICR,0endififdef PCMSK1PCIE1 avrbit PCICR,1endififdef PCMSK2PCIE2 avrbit PCICR,2endififdef PCMSK3PCIE3 avrbit PCICR,3endifendififdef PCIFRifdef PCMSK0PCIF0 avrbit PCIFR,0endififdef PCMSK1PCIF1 avrbit PCIFR,1endififdef PCMSK2PCIF2 avrbit PCIFR,2endififdef PCMSK3PCIF3 avrbit PCIFR,3endifendif;----------------------------------------------------------------------------; Timer; deduce interrupt status from interrupt enable bits__deducebit TOV0,TOIE0__deducebit OCF0,OCIE0__deducebit OCF0A,OCIE0A__deducebit OCF0B,OCIE0B__deducebit TOV1,TOIE1__deducebit OCF1A,OCIE1A__deducebit OCF1B,OCIE1B__deducebit OCF1C,OCIE1C__deducebit ICF1,TICIE1__deducebit TOV2,TOIE2__deducebit OCF2,OCIE2__deducebit OCF2A,OCIE2A__deducebit OCF2B,OCIE2B__deducebit ICF2,TICIE2__deducebit TOV3,TOIE3__deducebit OCF3,OCIE3__deducebit OCF3A,OCIE3A__deducebit OCF3B,OCIE3B__deducebit OCF3C,OCIE3C__deducebit ICF3,TICIE3__deducebit TOV4,TOIE4__deducebit OCF4,OCIE4__deducebit OCF4A,OCIE4A__deducebit OCF4B,OCIE4B__deducebit OCF4C,OCIE4C__deducebit ICF4,TICIE4__deducebit TOV5,TOIE5__deducebit OCF5,OCIE5__deducebit OCF5A,OCIE5A__deducebit OCF5B,OCIE5B__deducebit OCF5C,OCIE5C__deducebit ICF5,TICIE5;----------------------------------------------------------------------------restore ; wieder erlaubenendif ; __regavrinc