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ifndef __regf8inc ; avoid multiple inclusion__regf8inc equ 1savelisting off ; kein Listing ueber diesen File;****************************************************************************;* *;* AS 1.42 - File REGF8.INC *;* *;* Purpose : Contains SFR and Memory Definitions for F8 Processors *;* *;****************************************************************************;----------------------------------------------------------------------------; include proper CPU-specific register definitionsswitch MOMCPUNAME; no ROM, no XRAM, no Serial I/Ocase "F3850","MK3850"__hasserial equ 0; no ROM, 64b XRAM @ 4KB, no Serial I/Ocase "MK3874","MK38P70/02","MK38CP70/02","MK97400","MK97410"XRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 0; no ROM, 64b XRAM @ 64KB, no Serial I/Ocase "MK97500","MK97501","MK97503"XRAMSTART label 0ffc0hXRAMEND label 0ffffh__hasserial equ 0; 1K ROM, no XRAM, no Serial I/Ocase "MK3870/10","MK38C70/10"ROMSTART label 0ROMEND label 3ffh__hasserial equ 0; 1K ROM, 64b XRAM, no Serial I/Ocase "MK3870/12"ROMSTART label 0ROMEND label 3ffhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 0; 2K ROM, no XRAM, no Serial I/Ocase "MK3870","MK38C70","MK3870/20","MK38C70/20"ROMSTART label 0ROMEND label 7ffh__hasserial equ 0; 2K ROM, 64b XRAM, no Serial I/Ocase "MK3870/22","MK3875/22","MK3876"ROMSTART label 0ROMEND label 7ffhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 0; 3K ROM, no XRAM, no Serial I/Ocase "MK3870/30"ROMSTART label 0ROMEND label 0bffh__hasserial equ 0; 3K ROM, 64b XRAM, no Serial I/Ocase "MK3870/32"ROMSTART label 0ROMEND label 0bffhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 0; 4K ROM, no XRAM, no Serial I/Ocase "MK3870/40"ROMSTART label 0ROMEND label 0fffh__hasserial equ 0; 4K ROM, 64b XRAM, no Serial I/Ocase "MK3870/42","MK3872","MK3875","MK3875/42"ROMSTART label 0ROMEND label 0fbfhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 0; 1K ROM, no XRAM, Serial I/Ocase "MK3873/10"ROMSTART label 0ROMEND label 3ffh__hasserial equ 1; 1K ROM, 64b XRAM, Serial I/Ocase "MK3873/12"ROMSTART label 0ROMEND label 3ffhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 1; 2K ROM, no XRAM, Serial I/Ocase "MK3873","MK3873/20"ROMSTART label 0ROMEND label 7ffh__hasserial equ 1; 2K ROM, 64b XRAM, Serial I/Ocase "MK3873/22"ROMSTART label 0ROMEND label 7ffhXRAMSTART label 0fc0hXRAMEND label 0fffh__hasserial equ 1elsecaseerror "wrong processor target set: only F3850, MK3850, MK3870, MK3870/10, MK3870/12,"error "MK3870/20, MK3870/22, MK3870/30, MK3870/32, MK3870/40, MK3870/42, MK3872,"error "MK3873, MK3873/10, MK3873/12, MK3873/20, MK3873/22, MK3874, MK3875, MK3875/22,"error "MK3875/42, MK3876, MK38P70/02, MK38C70, MK38C70/10, MK38C70/20, MK97400,"fatal "MK97410, MK97500, MK97501, or MK97503 allowed!"endcaseif MOMPASS=1message "F8-Definitions (C) 2018 Alfred Arnold, Haruo Asano"endif;----------------------------------------------------------------------------; PortsPORT0 port 0PORT1 port 1PORT4 port 4PORT5 port 5;----------------------------------------------------------------------------; Interrupt ControlPORT6 port 6EI_EN equ 1 << 0 ; External Interrupt EnableTI_EN equ 1 << 1 ; Timer Interrupt EnableEI_LEVEL equ 1 << 2 ; External Interrupt Active LevelT_START equ 1 << 3 ; Start/Stop TimerT_MODE equ 1 << 4 ; Pulse Width/internal TimerT_SCALE_2 equ 1 << 5 ; /2 PrescaleT_SCALE_5 equ 1 << 6 ; /5 PrescaleT_SCALE_20 equ 1 << 7 ; /20 Prescale;----------------------------------------------------------------------------; TimerPORT7 port 7;----------------------------------------------------------------------------; Serial In/Outif __hasserialPORTC port 12 ; Baud Rate Control PortPORTD port 13 ; Serial Port Control & Status RegisterSI_EN equ 1 << 0 ; (w) Serial Port Interrupt EnableSER_TXRX equ 1 << 1 ; (w) Transmit/Receive OperationSER_MODE equ 1 << 2 ; (w) Synchronous/Asynchronous operationSER_SEARCH equ 1 << 3 ; (w) Search ModeSER_SDET equ 1 << 4 ; (w) Start DetectSER_N0 equ 1 << 5 ; (w) Word Length SelectSER_N1 equ 1 << 6SER_N2 equ 1 << 7SER_OUFL equ 1 << 6 ; (r) overflow/underflowSER_RDY equ 1 << 7 ; (r) readyPORTE port 14 ; Shift Register Buffer Upper HalfPORTF port 15 ; Shift Register Buffer Lower Halfendif ; __hasserial;----------------------------------------------------------------------------restore ; wieder erlaubenendif ; __regf8inc