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Rev Age Author Path Log message Diff Changes
66 2014-10-26 19:05:30 lvd /branches/clkfix/ Spawning new branch "clkfix" to try to fix glitches by adding extra clock to FPGA  
/branches/clkfix
60 2013-10-03 10:12:41 lvd /trunk/cpld/ zxiznet: dir structure  
/trunk/cpld/quartus
/trunk/cpld/rtl
/trunk/cpld/fix
59 2013-10-03 10:09:34 lvd /trunk/cpld/ zxiznet: trying to fix glitches...  
/trunk/cpld/fix
/trunk/cpld/fix/quartus
/trunk/cpld/fix/rtl
/trunk/cpld/quartus
/trunk/cpld/rtl
/trunk/cpld/fix/quartus/top.pof
/trunk/cpld/fix/quartus/top.qsf
/trunk/cpld/fix/rtl/top.v
/trunk/cpld/fix/rtl/zbus.v
13 2012-10-13 19:38:42 lvd /trunk/cpld/ initial verilog code and quartus project (not tested\!)  
/trunk/cpld/quartus/top.pof
/trunk/cpld/quartus/top.qpf
/trunk/cpld/quartus/top.qsf
/trunk/cpld/rtl/ports.v
/trunk/cpld/rtl/top.v
/trunk/cpld/rtl/wizmap.v
/trunk/cpld/rtl/zbus.v