| 94 |
2013-05-10 23:43:19 |
lvd |
/ |
added 4 independent paging ports, written test for it, compiled design |
|
| 93 |
2013-05-10 14:20:05 |
lvd |
/fpga/current/ |
tested timer, built FPGA firmware with it |
|
| 88 |
2013-05-06 12:55:54 |
lvd |
/fpga/current/ |
fixed typos in added functionality, not tested yet |
|
| 67 |
2011-01-17 02:51:54 |
lvd |
/ |
fpga/current: fresh build, z80/bootFPGA: fresh build (NOT CHECKED YET!) |
|
| 64 |
2010-12-26 13:58:15 |
lvd |
/fpga/current/ |
trying to fix ngs rev C... |
|
| 62 |
2010-11-25 10:46:05 |
lvd |
/fpga/current/ |
fpga/current: added 4mb addressing |
|
| 61 |
2010-11-25 00:20:25 |
lvd |
/fpga/current/ |
started refucktoring code and adding new features to FPGA.
now fpga/current is head of development (not checked yet) |
|
| 60 |
2010-11-23 12:13:09 |
lvd |
/ |
rebuilt both cpld5 and fpgaF with Q72, updated a little NGS_prm |
|
| 6 |
2009-12-06 20:08:08 |
lvd |
/ |
port GSCFG0, bit 7 - inversion of samples |
|