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Rev Age Author Path Log message Diff
94 2013-05-10 23:43:19 lvd / added 4 independent paging ports, written test for it, compiled design  
93 2013-05-10 14:20:05 lvd /fpga/current/ tested timer, built FPGA firmware with it  
92 2013-05-09 20:51:14 lvd /fpga/current/ used tv80 instead of T80  
91 2013-05-09 18:22:45 lvd / testbench started to work, T80 int ack cycle is wrong